riscv: avoid SIGILL in 64bit while jumping #140
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affecting 64bit when a jump was coded with 4 instructions, leaving one extra invalid instruction that would trigger SIGILL.
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Nice catch! Are these machines freely available for testing code? |
need to request for an account first, but they are meant for opensource development : |
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breaking test15 consistently when building against both available riscv nodes in the GCC compiler farm[1]
[1] https://cfarm.tetaneutral.net/machines/list/#