riscv: disable FPU when using soft-float ABI (zherczeg#147)

FPU support is optional and therefore is missing for ABI: ilp32 or lp64

The possibility of targeting a single float abi (ex: ilp32f) is punted
from the proposed logic as it is unlikely to be used outside of embedded
and will require further intrusive changes.

Changes to fully support soft-float also pending.

sljit_src/sljitNativeRISCV_common.c

@@ -531,6 +531,13 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type)
 {
 	switch (feature_type) {
 	case SLJIT_HAS_FPU:
+#ifdef SLJIT_IS_FPU_AVAILABLE
+		return SLJIT_IS_FPU_AVAILABLE;
+#elif defined(__riscv_float_abi_soft)
+		return 0;
+#else
+		return 1;
+#endif
 	case SLJIT_HAS_ZERO_REGISTER:
 		return 1;
 	default: