Add rd=x0 test case to csr test (riscv-software-src#308)

swl02 · Dec 8, 2020 · cbeadfd · cbeadfd
1 parent 4a54e2b
commit cbeadfd
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
@@ -48,6 +48,7 @@ RVTEST_CODE_BEGIN
 
   TEST_CASE(20, a0,         0, csrw sscratch, zero; csrr a0, sscratch);
   TEST_CASE(21, a0,         0, csrrwi a0, sscratch, 0; csrrwi a0, sscratch, 0xF);
+  TEST_CASE(22, a0,      0x1f, csrrsi x0, sscratch, 0x10; csrr a0, sscratch);
 
   csrwi sscratch, 3
   TEST_CASE( 2, a0,         3, csrr a0, sscratch);