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Merge tag 'ib-mfd-iio-pwm-4.11' into test
Immutable branch between MFD, IIO and PWM due for the v4.11 merge window Pulled into IIO to allow follow up series of triggered capture for the STM32 ADCs.
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What: /sys/bus/iio/devices/triggerX/master_mode_available | ||
KernelVersion: 4.11 | ||
Contact: [email protected] | ||
Description: | ||
Reading returns the list possible master modes which are: | ||
- "reset" : The UG bit from the TIMx_EGR register is used as trigger output (TRGO). | ||
- "enable" : The Counter Enable signal CNT_EN is used as trigger output. | ||
- "update" : The update event is selected as trigger output. | ||
For instance a master timer can then be used as a prescaler for a slave timer. | ||
- "compare_pulse" : The trigger output send a positive pulse when the CC1IF flag is to be set. | ||
- "OC1REF" : OC1REF signal is used as trigger output. | ||
- "OC2REF" : OC2REF signal is used as trigger output. | ||
- "OC3REF" : OC3REF signal is used as trigger output. | ||
- "OC4REF" : OC4REF signal is used as trigger output. | ||
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What: /sys/bus/iio/devices/triggerX/master_mode | ||
KernelVersion: 4.11 | ||
Contact: [email protected] | ||
Description: | ||
Reading returns the current master modes. | ||
Writing set the master mode | ||
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What: /sys/bus/iio/devices/triggerX/sampling_frequency | ||
KernelVersion: 4.11 | ||
Contact: [email protected] | ||
Description: | ||
Reading returns the current sampling frequency. | ||
Writing an value different of 0 set and start sampling. | ||
Writing 0 stop sampling. |
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Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
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STMicroelectronics STM32 Timers IIO timer bindings | ||
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Must be a sub-node of an STM32 Timers device tree node. | ||
See ../mfd/stm32-timers.txt for details about the parent node. | ||
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Required parameters: | ||
- compatible: Must be "st,stm32-timer-trigger". | ||
- reg: Identify trigger hardware block. | ||
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Example: | ||
timers@40010000 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
compatible = "st,stm32-timers"; | ||
reg = <0x40010000 0x400>; | ||
clocks = <&rcc 0 160>; | ||
clock-names = "clk_int"; | ||
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timer@0 { | ||
compatible = "st,stm32-timer-trigger"; | ||
reg = <0>; | ||
}; | ||
}; |
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STM32 Timers driver bindings | ||
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This IP provides 3 types of timer along with PWM functionality: | ||
- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable | ||
prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. | ||
- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a | ||
programmable prescaler and PWM outputs. | ||
- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. | ||
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Required parameters: | ||
- compatible: must be "st,stm32-timers" | ||
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- reg: Physical base address and length of the controller's | ||
registers. | ||
- clock-names: Set to "int". | ||
- clocks: Phandle to the clock used by the timer module. | ||
For Clk properties, please refer to ../clock/clock-bindings.txt | ||
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Optional parameters: | ||
- resets: Phandle to the parent reset controller. | ||
See ../reset/st,stm32-rcc.txt | ||
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Optional subnodes: | ||
- pwm: See ../pwm/pwm-stm32.txt | ||
- timer: See ../iio/timer/stm32-timer-trigger.txt | ||
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Example: | ||
timers@40010000 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
compatible = "st,stm32-timers"; | ||
reg = <0x40010000 0x400>; | ||
clocks = <&rcc 0 160>; | ||
clock-names = "clk_int"; | ||
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pwm { | ||
compatible = "st,stm32-pwm"; | ||
pinctrl-0 = <&pwm1_pins>; | ||
pinctrl-names = "default"; | ||
}; | ||
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timer@0 { | ||
compatible = "st,stm32-timer-trigger"; | ||
reg = <0>; | ||
}; | ||
}; |
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STMicroelectronics STM32 Timers PWM bindings | ||
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Must be a sub-node of an STM32 Timers device tree node. | ||
See ../mfd/stm32-timers.txt for details about the parent node. | ||
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Required parameters: | ||
- compatible: Must be "st,stm32-pwm". | ||
- pinctrl-names: Set to "default". | ||
- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. | ||
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt | ||
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Optional parameters: | ||
- st,breakinput: One or two <index level filter> to describe break input configurations. | ||
"index" indicates on which break input (0 or 1) the configuration | ||
should be applied. | ||
"level" gives the active level (0=low or 1=high) of the input signal | ||
for this configuration. | ||
"filter" gives the filtering value to be applied. | ||
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Example: | ||
timers@40010000 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
compatible = "st,stm32-timers"; | ||
reg = <0x40010000 0x400>; | ||
clocks = <&rcc 0 160>; | ||
clock-names = "clk_int"; | ||
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pwm { | ||
compatible = "st,stm32-pwm"; | ||
pinctrl-0 = <&pwm1_pins>; | ||
pinctrl-names = "default"; | ||
st,breakinput = <0 1 5>; | ||
}; | ||
}; |
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