MIPS: Octeon: Serial port fixes for OCTEON simulator.

For the simulator, fake a slow clock to get fast output. In prom_putchar we have to mask the value so the simulator doesn't ASSERT when printing non-ASCII characters. Signed-off-by: David Daney <[email protected]> To: [email protected] Patchwork: http://patchwork.linux-mips.org/patch/1255/ Signed-off-by: Ralf Baechle <[email protected]>
mrcsosa · May 21, 2010 · 606c958 · 606c958
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Showing 2 changed files with 6 additions and 2 deletions.
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c
@@ -65,7 +65,11 @@ static void __init octeon_uart_set_common(struct plat_serial8250_port *p)
 	p->type = PORT_OCTEON;
 	p->iotype = UPIO_MEM;
 	p->regshift = 3;	/* I/O addresses are every 8 bytes */
-	p->uartclk = mips_hpt_frequency;
+	if (octeon_is_simulation())
+		/* Make simulator output fast*/
+		p->uartclk = 115200 * 16;
+	else
+		p->uartclk = mips_hpt_frequency;
 	p->serial_in = octeon_serial_in;
 	p->serial_out = octeon_serial_out;
 }

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
@@ -702,7 +702,7 @@ int prom_putchar(char c)
 	} while ((lsrval & 0x20) == 0);
 
 	/* Write the byte */
-	cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c);
+	cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull);
 	return 1;
 }