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iio: adc: adrv9009: Add ADRV9009 wideband RF transceiver Linux device…
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… driver

The ADRV9009 is a highly integrated, radio frequency (RF) agile transceiver
offering dual transmitters and receivers, integrated synthesizers,
and digital signal processing functions. The receive path consists of two
independent, wide bandwidth, direct conversion receivers with state-of-the-art
dynamic range. The part also supports a wide-bandwidth time-shared observation
path receiver for use in TDD applications. The complete receive subsystem
includes automatic and manual attenuation control, dc offset correction,
quadrature error correction (QEC), and digital filtering, thus eliminating
the need for these functions in the digital baseband. Several auxiliary
functions such as ADCs, DACs, and GPIOs for PA and RF-front-end control are
also integrated. In addition to the autonomous AGC, it also has flexible
external gain control modes, allowing significant flexibility in setting
system level gain dynamically.

Signed-off-by: Michael Hennerich <[email protected]>
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mhennerich committed Jun 11, 2018
1 parent 96bf5ae commit 00ec46d
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460 changes: 460 additions & 0 deletions arch/arm/boot/dts/adi-adrv9009.dtsi
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307 changes: 307 additions & 0 deletions arch/arm/boot/dts/zynq-zc706-adv7511-adrv9009.dts
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/dts-v1/;

/include/ "zynq-zc706.dtsi"
/include/ "zynq-zc706-adv7511.dtsi"



&i2c_mux {
i2c@5 { /* HPC IIC */
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;

eeprom@50 {
compatible = "at24,24c02";
reg = <0x50>;
};

eeprom@54 {
compatible = "at24,24c02";
reg = <0x54>;
};

ad7291@2f {
compatible = "adi,ad7291";
reg = <0x2f>;
};
};
};

&fpga_axi {
rx_dma: rx-dmac@7c400000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x7c400000 0x10000>;
#dma-cells = <1>;
interrupts = <0 57 0>;
clocks = <&clkc 16>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <64>;
adi,source-bus-type = <2>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

rx_obs_dma: rx-obs-dmac@7c440000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x7c440000 0x10000>;
#dma-cells = <1>;
interrupts = <0 55 0>;
clocks = <&clkc 16>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <64>;
adi,source-bus-type = <2>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

tx_dma: tx-dmac@7c420000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x7c420000 0x10000>;
#dma-cells = <1>;
interrupts = <0 56 0>;
clocks = <&clkc 16>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <128>;
adi,source-bus-type = <0>;
adi,destination-bus-width = <128>;
adi,destination-bus-type = <2>;
adi,cyclic;
};
};
};

axi_adrv9009_core_rx: axi-adrv9009-rx-hpc@44a00000 {
compatible = "adi,axi-adrv9009-rx-1.0";
reg = <0x44a00000 0x8000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
spibus-connected = <&trx0_adrv9009>;
};

axi_adrv9009_core_rx_obs: axi-adrv9009-rx-obs-hpc@44a08000 {
compatible = "adi,axi-adrv9009-obs-1.0";
reg = <0x44a08000 0x1000>;
dmas = <&rx_obs_dma 0>;
dma-names = "rx";
clocks = <&trx0_adrv9009 1>;
clock-names = "sampl_clk";
};

axi_adrv9009_core_tx: axi-adrv9009-tx-hpc@44a04000 {
compatible = "adi,axi-adrv9009-tx-1.0";
reg = <0x44a04000 0x4000>;
dmas = <&tx_dma 0>;
dma-names = "tx";
clocks = <&trx0_adrv9009 2>;
clock-names = "sampl_clk";
spibus-connected = <&trx0_adrv9009>;
adi,axi-pl-fifo-enable;
};

axi_adrv9009_rx_jesd: axi-jesd204-rx@44aa0000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x44aa0000 0x1000>;

interrupts = <0 54 0>;

clocks = <&clkc 16>, <&axi_rx_clkgen>, <&axi_adrv9009_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";

#clock-cells = <0>;
clock-output-names = "jesd_rx_lane_clk";

adi,octets-per-frame = <4>;
adi,frames-per-multiframe = <32>;
};

axi_adrv9009_tx_jesd: axi-jesd204-tx@44a90000 {
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x44a90000 0x1000>;

interrupts = <0 53 0>;

clocks = <&clkc 16>, <&axi_tx_clkgen>, <&axi_adrv9009_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";

#clock-cells = <0>;
clock-output-names = "jesd_tx_lane_clk";

adi,octets-per-frame = <2>;
adi,frames-per-multiframe = <32>;
adi,converter-resolution = <16>;
adi,bits-per-sample = <16>;
adi,converters-per-device = <4>;
adi,control-bits-per-sample = <0>;
};

axi_adrv9009_rx_os_jesd: axi-jesd204-rx@44ab0000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x44ab0000 0x1000>;

interrupts = <0 52 0>;

clocks = <&clkc 16>, <&axi_rx_os_clkgen>, <&axi_adrv9009_adxcvr_rx_os 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";

#clock-cells = <0>;
clock-output-names = "jesd_rx_os_lane_clk";

adi,octets-per-frame = <2>;
adi,frames-per-multiframe = <32>;
};

axi_tx_clkgen: axi-clkgen@43c00000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x43c00000 0x10000>;
#clock-cells = <0>;
clocks = <&clk0_ad9528 1>;
clock-output-names = "axi_tx_clkgen";
};

axi_rx_clkgen: axi-clkgen@43c10000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x43c10000 0x10000>;
#clock-cells = <0>;
clocks = <&clk0_ad9528 1>;
clock-output-names = "axi_rx_clkgen";
};

axi_rx_os_clkgen: axi-clkgen@43c20000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x43c20000 0x10000>;
#clock-cells = <0>;
clocks = <&clk0_ad9528 1>;
clock-output-names = "axi_rx_os_clkgen";
};

axi_adrv9009_adxcvr_rx: axi-adxcvr-rx@44a60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x44a60000 0x1000>;

clocks = <&clk0_ad9528 1>, <&axi_rx_clkgen 0>;
clock-names = "conv", "div40";

#clock-cells = <1>;
clock-output-names = "rx_gt_clk", "rx_out_clk";

adi,sys-clk-select = <0>;
adi,out-clk-select = <3>;
adi,use-lpm-enable;
adi,use-cpll-enable;
};

axi_adrv9009_adxcvr_rx_os: axi-adxcvr-rx-os@44a50000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x44a50000 0x1000>;

clocks = <&clk0_ad9528 1>, <&axi_rx_os_clkgen>;
clock-names = "conv", "div40";

#clock-cells = <1>;
clock-output-names = "rx_os_gt_clk", "rx_os_out_clk";

adi,sys-clk-select = <0>;
adi,out-clk-select = <3>;
adi,use-lpm-enable;
adi,use-cpll-enable;
};

axi_adrv9009_adxcvr_tx: axi-adxcvr-tx@44a80000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x44a80000 0x1000>;

clocks = <&clk0_ad9528 1>, <&axi_tx_clkgen>;
clock-names = "conv", "div40";

#clock-cells = <1>;
clock-output-names = "tx_gt_clk", "tx_out_clk";

adi,sys-clk-select = <3>;
adi,out-clk-select = <3>;
};
};

&spi0 {
status = "okay";
};

#define fmc_spi spi0

#include "adi-adrv9009.dtsi"

// adrv9009_dac_fifo_bypass_s 60
// ad9528_reset_b, // 59
// ad9528_sysref_req, // 58
// adrv9009_tx1_enable, // 57
// adrv9009_tx2_enable, // 56
// adrv9009_rx1_enable, // 55
// adrv9009_rx2_enable, // 54
// adrv9009_test, // 53
// adrv9009_reset_b, // 52
// adrv9009_gpint, // 51
// adrv9009_gpio_00, // 50
// adrv9009_gpio_01, // 49
// adrv9009_gpio_02, // 48
// adrv9009_gpio_03, // 47
// adrv9009_gpio_04, // 46
// adrv9009_gpio_05, // 45
// adrv9009_gpio_06, // 44
// adrv9009_gpio_07, // 43
// adrv9009_gpio_15, // 42
// adrv9009_gpio_08, // 41
// adrv9009_gpio_09, // 40
// adrv9009_gpio_10, // 39
// adrv9009_gpio_11, // 38
// adrv9009_gpio_12, // 37
// adrv9009_gpio_14, // 36
// adrv9009_gpio_13, // 35
// adrv9009_gpio_17, // 34
// adrv9009_gpio_16, // 33
// adrv9009_gpio_18})); // 32 + 54

&trx0_adrv9009 {
reset-gpios = <&gpio0 106 0>;
test-gpios = <&gpio0 107 0>;
sysref-req-gpios = <&gpio0 112 0>;
rx2-enable-gpios = <&gpio0 108 0>;
rx1-enable-gpios = <&gpio0 109 0>;
tx2-enable-gpios = <&gpio0 110 0>;
tx1-enable-gpios = <&gpio0 111 0>;
};

&clk0_ad9528 {
reset-gpios = <&gpio0 113 0>;
};

&axi_adrv9009_core_tx {
plddrbypass-gpios = <&gpio0 114 0>;
};
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