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target-ppc: convert fp ops to TCG
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Signed-off-by: Aurelien Jarno <[email protected]>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5754 c046a42c-6fe2-441c-8c8c-71466251a162
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aurel32 committed Nov 19, 2008
1 parent a3d6841 commit af12906
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Showing 6 changed files with 550 additions and 636 deletions.
1 change: 0 additions & 1 deletion target-ppc/cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -571,7 +571,6 @@ struct CPUPPCState {
/* temporary float registers */
float64 ft0;
float64 ft1;
float64 ft2;
float_status fp_status;
/* floating point registers */
float64 fpr[32];
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1 change: 0 additions & 1 deletion target-ppc/exec.h
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,6 @@ register target_ulong T2 asm(AREG3);

#define FT0 (env->ft0)
#define FT1 (env->ft1)
#define FT2 (env->ft2)

#if defined (DEBUG_OP)
# define RETURN() __asm__ __volatile__("nop" : : : "memory");
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42 changes: 40 additions & 2 deletions target-ppc/helper.h
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#include "def-helper.h"

DEF_HELPER_0(fcmpo, i32)
DEF_HELPER_0(fcmpu, i32)
DEF_HELPER_2(fcmpo, i32, i64, i64)
DEF_HELPER_2(fcmpu, i32, i64, i64)

DEF_HELPER_0(load_cr, tl)
DEF_HELPER_2(store_cr, void, tl, i32)
Expand All @@ -25,4 +25,42 @@ DEF_HELPER_1(cntlsw32, i32, i32)
DEF_HELPER_1(cntlzw32, i32, i32)
DEF_HELPER_2(brinc, tl, tl, tl)

DEF_HELPER_0(float_check_status, void)
#ifdef CONFIG_SOFTFLOAT
DEF_HELPER_0(reset_fpstatus, void)
#endif
DEF_HELPER_2(compute_fprf, i32, i64, i32)
DEF_HELPER_2(store_fpscr, void, i64, i32)
DEF_HELPER_1(fpscr_setbit, void, i32)

DEF_HELPER_1(fctiw, i64, i64)
DEF_HELPER_1(fctiwz, i64, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_1(fcfid, i64, i64)
DEF_HELPER_1(fctid, i64, i64)
DEF_HELPER_1(fctidz, i64, i64)
#endif
DEF_HELPER_1(frsp, i64, i64)
DEF_HELPER_1(frin, i64, i64)
DEF_HELPER_1(friz, i64, i64)
DEF_HELPER_1(frip, i64, i64)
DEF_HELPER_1(frim, i64, i64)

DEF_HELPER_2(fadd, i64, i64, i64)
DEF_HELPER_2(fsub, i64, i64, i64)
DEF_HELPER_2(fmul, i64, i64, i64)
DEF_HELPER_2(fdiv, i64, i64, i64)
DEF_HELPER_3(fmadd, i64, i64, i64, i64)
DEF_HELPER_3(fmsub, i64, i64, i64, i64)
DEF_HELPER_3(fnmadd, i64, i64, i64, i64)
DEF_HELPER_3(fnmsub, i64, i64, i64, i64)
DEF_HELPER_1(fabs, i64, i64)
DEF_HELPER_1(fnabs, i64, i64)
DEF_HELPER_1(fneg, i64, i64)
DEF_HELPER_1(fsqrt, i64, i64);
DEF_HELPER_1(fre, i64, i64);
DEF_HELPER_1(fres, i64, i64);
DEF_HELPER_1(frsqrte, i64, i64);
DEF_HELPER_3(fsel, i64, i64, i64, i64)

#include "def-helper.h"
280 changes: 0 additions & 280 deletions target-ppc/op.c
Original file line number Diff line number Diff line change
Expand Up @@ -261,293 +261,13 @@ void OPPROTO op_store_dbatl (void)
}
#endif /* !defined(CONFIG_USER_ONLY) */

/* FPSCR */
#ifdef CONFIG_SOFTFLOAT
void OPPROTO op_reset_fpstatus (void)
{
env->fp_status.float_exception_flags = 0;
RETURN();
}
#endif

void OPPROTO op_compute_fprf (void)
{
do_compute_fprf(PARAM1);
RETURN();
}

#ifdef CONFIG_SOFTFLOAT
void OPPROTO op_float_check_status (void)
{
do_float_check_status();
RETURN();
}
#else
void OPPROTO op_float_check_status (void)
{
if (env->exception_index == POWERPC_EXCP_PROGRAM &&
(env->error_code & POWERPC_EXCP_FP)) {
/* Differred floating-point exception after target FPR update */
if (msr_fe0 != 0 || msr_fe1 != 0)
do_raise_exception_err(env->exception_index, env->error_code);
}
RETURN();
}
#endif

void OPPROTO op_load_fpscr_FT0 (void)
{
/* The 32 MSB of the target fpr are undefined.
* They'll be zero...
*/
CPU_DoubleU u;

u.l.upper = 0;
u.l.lower = env->fpscr;
FT0 = u.d;
RETURN();
}

void OPPROTO op_fpscr_resetbit (void)
{
env->fpscr &= PARAM1;
RETURN();
}

void OPPROTO op_fpscr_setbit (void)
{
do_fpscr_setbit(PARAM1);
RETURN();
}

void OPPROTO op_store_fpscr (void)
{
do_store_fpscr(PARAM1);
RETURN();
}

/*** Integer shift ***/
void OPPROTO op_srli_T1 (void)
{
T1 = (uint32_t)T1 >> PARAM1;
RETURN();
}

/*** Floating-Point arithmetic ***/
/* fadd - fadd. */
void OPPROTO op_fadd (void)
{
#if USE_PRECISE_EMULATION
do_fadd();
#else
FT0 = float64_add(FT0, FT1, &env->fp_status);
#endif
RETURN();
}

/* fsub - fsub. */
void OPPROTO op_fsub (void)
{
#if USE_PRECISE_EMULATION
do_fsub();
#else
FT0 = float64_sub(FT0, FT1, &env->fp_status);
#endif
RETURN();
}

/* fmul - fmul. */
void OPPROTO op_fmul (void)
{
#if USE_PRECISE_EMULATION
do_fmul();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
#endif
RETURN();
}

/* fdiv - fdiv. */
void OPPROTO op_fdiv (void)
{
#if USE_PRECISE_EMULATION
do_fdiv();
#else
FT0 = float64_div(FT0, FT1, &env->fp_status);
#endif
RETURN();
}

/* fsqrt - fsqrt. */
void OPPROTO op_fsqrt (void)
{
do_fsqrt();
RETURN();
}

/* fre - fre. */
void OPPROTO op_fre (void)
{
do_fre();
RETURN();
}

/* fres - fres. */
void OPPROTO op_fres (void)
{
do_fres();
RETURN();
}

/* frsqrte - frsqrte. */
void OPPROTO op_frsqrte (void)
{
do_frsqrte();
RETURN();
}

/* fsel - fsel. */
void OPPROTO op_fsel (void)
{
do_fsel();
RETURN();
}

/*** Floating-Point multiply-and-add ***/
/* fmadd - fmadd. */
void OPPROTO op_fmadd (void)
{
#if USE_PRECISE_EMULATION
do_fmadd();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
FT0 = float64_add(FT0, FT2, &env->fp_status);
#endif
RETURN();
}

/* fmsub - fmsub. */
void OPPROTO op_fmsub (void)
{
#if USE_PRECISE_EMULATION
do_fmsub();
#else
FT0 = float64_mul(FT0, FT1, &env->fp_status);
FT0 = float64_sub(FT0, FT2, &env->fp_status);
#endif
RETURN();
}

/* fnmadd - fnmadd. - fnmadds - fnmadds. */
void OPPROTO op_fnmadd (void)
{
do_fnmadd();
RETURN();
}

/* fnmsub - fnmsub. */
void OPPROTO op_fnmsub (void)
{
do_fnmsub();
RETURN();
}

/*** Floating-Point round & convert ***/
/* frsp - frsp. */
void OPPROTO op_frsp (void)
{
#if USE_PRECISE_EMULATION
do_frsp();
#else
FT0 = float64_to_float32(FT0, &env->fp_status);
#endif
RETURN();
}

/* fctiw - fctiw. */
void OPPROTO op_fctiw (void)
{
do_fctiw();
RETURN();
}

/* fctiwz - fctiwz. */
void OPPROTO op_fctiwz (void)
{
do_fctiwz();
RETURN();
}

#if defined(TARGET_PPC64)
/* fcfid - fcfid. */
void OPPROTO op_fcfid (void)
{
do_fcfid();
RETURN();
}

/* fctid - fctid. */
void OPPROTO op_fctid (void)
{
do_fctid();
RETURN();
}

/* fctidz - fctidz. */
void OPPROTO op_fctidz (void)
{
do_fctidz();
RETURN();
}
#endif

void OPPROTO op_frin (void)
{
do_frin();
RETURN();
}

void OPPROTO op_friz (void)
{
do_friz();
RETURN();
}

void OPPROTO op_frip (void)
{
do_frip();
RETURN();
}

void OPPROTO op_frim (void)
{
do_frim();
RETURN();
}

/*** Floating-point move ***/
/* fabs */
void OPPROTO op_fabs (void)
{
FT0 = float64_abs(FT0);
RETURN();
}

/* fnabs */
void OPPROTO op_fnabs (void)
{
FT0 = float64_abs(FT0);
FT0 = float64_chs(FT0);
RETURN();
}

/* fneg */
void OPPROTO op_fneg (void)
{
FT0 = float64_chs(FT0);
RETURN();
}

/* Load and store */
#define MEMSUFFIX _raw
#include "op_helper.h"
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