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qlge: Fix timeout on indexed register wait.
There are 8 banks of 'sub-registers' each of which are accessed through address/data register pair. An example would be reading flash or the xgmac. Accessing these require the driver to wait for a ready bit before writing the address and then accessing the data. This patch increases the timeout to 100us to prevent timeouts that have been seen on some platforms. These register are accessed in process context only. Signed-off-by: Ron Mercer <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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