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Actual intel IOMMU driver. Hardware spec can be found at: http://www.intel.com/technology/virtualization This driver sets X86_64 'dma_ops', so hook into standard DMA APIs. In this way, PCI driver will get virtual DMA address. This change is transparent to PCI drivers. [[email protected]: remove unneeded cast] [[email protected]: build fix] [[email protected]: fix duplicate CONFIG_DMAR Makefile line] Signed-off-by: Anil S Keshavamurthy <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Muli Ben-Yehuda <[email protected]> Cc: "Siddha, Suresh B" <[email protected]> Cc: Arjan van de Ven <[email protected]> Cc: Ashok Raj <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Christoph Lameter <[email protected]> Cc: Greg KH <[email protected]> Signed-off-by: Adrian Bunk <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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Linux IOMMU Support | ||
=================== | ||
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The architecture spec can be obtained from the below location. | ||
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http://www.intel.com/technology/virtualization/ | ||
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This guide gives a quick cheat sheet for some basic understanding. | ||
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Some Keywords | ||
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DMAR - DMA remapping | ||
DRHD - DMA Engine Reporting Structure | ||
RMRR - Reserved memory Region Reporting Structure | ||
ZLR - Zero length reads from PCI devices | ||
IOVA - IO Virtual address. | ||
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Basic stuff | ||
----------- | ||
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ACPI enumerates and lists the different DMA engines in the platform, and | ||
device scope relationships between PCI devices and which DMA engine controls | ||
them. | ||
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What is RMRR? | ||
------------- | ||
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There are some devices the BIOS controls, for e.g USB devices to perform | ||
PS2 emulation. The regions of memory used for these devices are marked | ||
reserved in the e820 map. When we turn on DMA translation, DMA to those | ||
regions will fail. Hence BIOS uses RMRR to specify these regions along with | ||
devices that need to access these regions. OS is expected to setup | ||
unity mappings for these regions for these devices to access these regions. | ||
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How is IOVA generated? | ||
--------------------- | ||
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Well behaved drivers call pci_map_*() calls before sending command to device | ||
that needs to perform DMA. Once DMA is completed and mapping is no longer | ||
required, device performs a pci_unmap_*() calls to unmap the region. | ||
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The Intel IOMMU driver allocates a virtual address per domain. Each PCIE | ||
device has its own domain (hence protection). Devices under p2p bridges | ||
share the virtual address with all devices under the p2p bridge due to | ||
transaction id aliasing for p2p bridges. | ||
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IOVA generation is pretty generic. We used the same technique as vmalloc() | ||
but these are not global address spaces, but separate for each domain. | ||
Different DMA engines may support different number of domains. | ||
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We also allocate gaurd pages with each mapping, so we can attempt to catch | ||
any overflow that might happen. | ||
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Graphics Problems? | ||
------------------ | ||
If you encounter issues with graphics devices, you can try adding | ||
option intel_iommu=igfx_off to turn off the integrated graphics engine. | ||
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Some exceptions to IOVA | ||
----------------------- | ||
Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff). | ||
The same is true for peer to peer transactions. Hence we reserve the | ||
address from PCI MMIO ranges so they are not allocated for IOVA addresses. | ||
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Boot Message Sample | ||
------------------- | ||
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Something like this gets printed indicating presence of DMAR tables | ||
in ACPI. | ||
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ACPI: DMAR (v001 A M I OEMDMAR 0x00000001 MSFT 0x00000097) @ 0x000000007f5b5ef0 | ||
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When DMAR is being processed and initialized by ACPI, prints DMAR locations | ||
and any RMRR's processed. | ||
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ACPI DMAR:Host address width 36 | ||
ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed90000 | ||
ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed91000 | ||
ACPI DMAR:DRHD (flags: 0x00000001)base: 0x00000000fed93000 | ||
ACPI DMAR:RMRR base: 0x00000000000ed000 end: 0x00000000000effff | ||
ACPI DMAR:RMRR base: 0x000000007f600000 end: 0x000000007fffffff | ||
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When DMAR is enabled for use, you will notice.. | ||
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PCI-DMA: Using DMAR IOMMU | ||
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TBD | ||
---- | ||
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- For compatibility testing, could use unity map domain for all devices, just | ||
provide a 1-1 for all useful memory under a single domain for all devices. | ||
- API for paravirt ops for abstracting functionlity for VMM folks. |
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