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1. ibex ibex Public

   Forked from lowRISC/ibex

   Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.

   SystemVerilog

2. riscv-openocd riscv-openocd Public

   Forked from riscv-collab/riscv-openocd

   Fork of OpenOCD that has RISC-V support

   C

3. pulpissimo pulpissimo Public

   Forked from pulp-platform/pulpissimo

   This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

   SystemVerilog

4. jtag_vpi jtag_vpi Public

   Forked from fjullien/jtag_vpi

   TCP/IP controlled VPI JTAG Interface.

   Verilog

5. elf2hex elf2hex Public

   Forked from sifive/elf2hex

   Converts ELF files to HEX files that are suitable for Verilog's readmemh.

   Shell

6. openocd openocd Public

   A mirror of the official openocd repository, for the integration of virtual debug interface. This repository is read only, cloned from repo on: sourceforge.net/p/openocd/code/ci/master/tree/

   C