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media: ov6650: Fix arbitrary selection of master clock rate
A hardcoded 12 MHz master clock frequency has been assumed since conversion of the driver from soc_camera sensor to a standalone V4L2 subdevice by commit 23a5238 ("media: ov6650: convert to standalone v4l2 subdevice"). Fix it. Define a static table of supported master clock rates (fix misnamed symbol while being at it), then use v4l2_clk_get/set_rate() to obtain a clock rate matching one of those supported. On success, apply respective master clock hardware divisor provided by the matching element of the table. [Sakari Ailus: Initialize xclk to NULL.] Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Sakari Ailus <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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