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Merge tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel…
…/git/gregkh/usb Pull USB/PHY/Thunderbolt driver updates from Greg KH: "Here is the big set of USB, PHY, and Thunderbolt driver updates for 5.10-rc1. Lots of tiny different things for these subsystems are in here, including: - phy driver updates - thunderbolt / USB 4 updates and additions - USB gadget driver updates - xhci fixes and updates - typec driver additions and updates - api conversions to various drivers for core kernel api changes - new USB control message functions to make it harder to get wrong, as found by syzbot (took 2 tries to get it right) - lots of tiny USB driver fixes and updates all over the place All of these have been in linux-next for a while, with the exception of the last "obviously correct" patch that updated a FALLTHROUGH comment that got merged last weekend" * tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (374 commits) usb: musb: gadget: Use fallthrough pseudo-keyword usb: typec: Add QCOM PMIC typec detection driver USB: serial: option: add Cellient MPL200 card usb: typec: tcpci_maxim: Add support for Sink FRS usb: typec: tcpci: Implement callbacks for FRS usb: typec: tcpm: Add support for Sink Fast Role SWAP(FRS) usb: typec: tcpci_maxim: Chip level TCPC driver usb: typec: tcpci: Add set_vbus tcpci callback usb: typec: tcpci: Add a getter method to retrieve tcpm_port reference usbip: vhci_hcd: fix calling usb_hcd_giveback_urb() with irqs enabled usb: cdc-acm: add quirk to blacklist ETAS ES58X devices USB: serial: ftdi_sio: use cur_altsetting for consistency USB: serial: option: Add Telit FT980-KS composition USB: core: remove polling for /sys/kernel/debug/usb/devices usb: typec: add support for STUSB160x Type-C controller family usb: typec: add typec_find_pwr_opmode usb: typec: hd3ss3220: Use OF graph API to get the connector fwnode dt-bindings: usb: renesas,usb3-peri: Document HS and SS data bus dt-bindings: usb: convert ti,hd3ss3220 bindings to json-schema usb: dwc2: Fix INTR OUT transfers in DDMA mode. ...
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58 changes: 58 additions & 0 deletions
58
Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Intel LGM USB PHY Device Tree Bindings | ||
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maintainers: | ||
- Vadivel Murugan Ramuthevar <[email protected]> | ||
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properties: | ||
compatible: | ||
const: intel,lgm-usb-phy | ||
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reg: | ||
maxItems: 1 | ||
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clocks: | ||
maxItems: 1 | ||
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resets: | ||
items: | ||
- description: USB PHY and Host controller reset | ||
- description: APB BUS reset | ||
- description: General Hardware reset | ||
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reset-names: | ||
items: | ||
- const: phy | ||
- const: apb | ||
- const: phy31 | ||
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"#phy-cells": | ||
const: 0 | ||
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required: | ||
- compatible | ||
- clocks | ||
- reg | ||
- resets | ||
- reset-names | ||
- "#phy-cells" | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
usb-phy@e7e00000 { | ||
compatible = "intel,lgm-usb-phy"; | ||
reg = <0xe7e00000 0x10000>; | ||
clocks = <&cgu0 153>; | ||
resets = <&rcu 0x70 0x24>, | ||
<&rcu 0x70 0x26>, | ||
<&rcu 0x70 0x28>; | ||
reset-names = "phy", "apb", "phy31"; | ||
#phy-cells = <0>; | ||
}; |
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@@ -4,11 +4,13 @@ | |
$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#" | ||
$schema: "http://devicetree.org/meta-schemas/core.yaml#" | ||
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title: Cadence Torrent SD0801 PHY binding for DisplayPort | ||
title: Cadence Torrent SD0801 PHY binding | ||
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description: | ||
This binding describes the Cadence SD0801 PHY (also known as Torrent PHY) | ||
hardware included with the Cadence MHDP DisplayPort controller. | ||
hardware included with the Cadence MHDP DisplayPort controller. Torrent | ||
PHY also supports multilink multiprotocol combinations including protocols | ||
such as PCIe, USB, SGMII, QSGMII etc. | ||
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maintainers: | ||
- Swapnil Jakhade <[email protected]> | ||
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@@ -49,20 +51,30 @@ properties: | |
- const: dptx_phy | ||
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resets: | ||
maxItems: 1 | ||
description: | ||
Torrent PHY reset. | ||
See Documentation/devicetree/bindings/reset/reset.txt | ||
minItems: 1 | ||
maxItems: 2 | ||
items: | ||
- description: Torrent PHY reset. | ||
- description: Torrent APB reset. This is optional. | ||
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reset-names: | ||
minItems: 1 | ||
maxItems: 2 | ||
items: | ||
- const: torrent_reset | ||
- const: torrent_apb | ||
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patternProperties: | ||
'^phy@[0-7]+$': | ||
'^phy@[0-3]$': | ||
type: object | ||
description: | ||
Each group of PHY lanes with a single master lane should be represented as a sub-node. | ||
properties: | ||
reg: | ||
description: | ||
The master lane number. This is the lowest numbered lane in the lane group. | ||
minimum: 0 | ||
maximum: 3 | ||
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resets: | ||
minItems: 1 | ||
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@@ -78,15 +90,25 @@ patternProperties: | |
Specifies the type of PHY for which the group of PHY lanes is used. | ||
Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
enum: [1, 2, 3, 4, 5, 6] | ||
minimum: 1 | ||
maximum: 9 | ||
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cdns,num-lanes: | ||
description: | ||
Number of DisplayPort lanes. | ||
Number of lanes. | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
enum: [1, 2, 4] | ||
enum: [1, 2, 3, 4] | ||
default: 4 | ||
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cdns,ssc-mode: | ||
description: | ||
Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC, | ||
EXTERNAL_SSC or INTERNAL_SSC. | ||
Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used. | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
enum: [0, 1, 2] | ||
default: 0 | ||
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cdns,max-bit-rate: | ||
description: | ||
Maximum DisplayPort link bit rate to use, in Mbps | ||
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@@ -99,6 +121,7 @@ patternProperties: | |
- resets | ||
- "#phy-cells" | ||
- cdns,phy-type | ||
- cdns,num-lanes | ||
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additionalProperties: false | ||
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@@ -111,6 +134,7 @@ required: | |
- reg | ||
- reg-names | ||
- resets | ||
- reset-names | ||
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additionalProperties: false | ||
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@@ -128,18 +152,56 @@ examples: | |
<0xf0 0xfb030a00 0x0 0x00000040>; | ||
reg-names = "torrent_phy", "dptx_phy"; | ||
resets = <&phyrst 0>; | ||
reset-names = "torrent_reset"; | ||
clocks = <&ref_clk>; | ||
clock-names = "refclk"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
phy@0 { | ||
reg = <0>; | ||
resets = <&phyrst 1>, <&phyrst 2>, | ||
<&phyrst 3>, <&phyrst 4>; | ||
#phy-cells = <0>; | ||
cdns,phy-type = <PHY_TYPE_DP>; | ||
cdns,num-lanes = <4>; | ||
cdns,max-bit-rate = <8100>; | ||
reg = <0>; | ||
resets = <&phyrst 1>, <&phyrst 2>, | ||
<&phyrst 3>, <&phyrst 4>; | ||
#phy-cells = <0>; | ||
cdns,phy-type = <PHY_TYPE_DP>; | ||
cdns,num-lanes = <4>; | ||
cdns,max-bit-rate = <8100>; | ||
}; | ||
}; | ||
}; | ||
- | | ||
#include <dt-bindings/phy/phy.h> | ||
#include <dt-bindings/phy/phy-cadence-torrent.h> | ||
bus { | ||
#address-cells = <2>; | ||
#size-cells = <2>; | ||
torrent-phy@f0fb500000 { | ||
compatible = "cdns,torrent-phy"; | ||
reg = <0xf0 0xfb500000 0x0 0x00100000>; | ||
reg-names = "torrent_phy"; | ||
resets = <&phyrst 0>, <&phyrst 1>; | ||
reset-names = "torrent_reset", "torrent_apb"; | ||
clocks = <&ref_clk>; | ||
clock-names = "refclk"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
phy@0 { | ||
reg = <0>; | ||
resets = <&phyrst 2>, <&phyrst 3>; | ||
#phy-cells = <0>; | ||
cdns,phy-type = <PHY_TYPE_PCIE>; | ||
cdns,num-lanes = <2>; | ||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>; | ||
}; | ||
phy@2 { | ||
reg = <2>; | ||
resets = <&phyrst 4>; | ||
#phy-cells = <0>; | ||
cdns,phy-type = <PHY_TYPE_SGMII>; | ||
cdns,num-lanes = <1>; | ||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>; | ||
}; | ||
}; | ||
}; | ||
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