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The Terasic DECA board as a mandelbrot acceleerator

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deca-mandelbrot

The Terasic DECA board as a mandelbrot accelerator. This is a hobby project to explore parallel computation/pipelining on a FPGA.

current status

  • working: two 72 bit fixed point mandelbrot 3 cores run at 60 MHz
  • still needs improvement: better resource usage, pipelining, more efficient USB data transfer
  • very rough client app with hardwired parameters
  • produces beautiful images: image

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The Terasic DECA board as a mandelbrot acceleerator

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