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Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/l…
…inux/kernel/git/tip/tip Pull IRQ chip updates from Ingo Molnar: "A late irqchips update: - New TI INTR/INTA set of drivers - Rewrite of the stm32mp1-exti driver as a platform driver - Update the IOMMU MSI mapping API to be RT friendly - A number of cleanups and other low impact fixes" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits) iommu/dma-iommu: Remove iommu_dma_map_msi_msg() irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg() irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg() irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg() irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg() iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts genirq/msi: Add a new field in msi_desc to store an IOMMU cookie arm64: arch_k3: Enable interrupt controller drivers irqchip/ti-sci-inta: Add msi domain support soc: ti: Add MSI domain bus support for Interrupt Aggregator irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings irqchip/ti-sci-intr: Add support for Interrupt Router driver dt-bindings: irqchip: Introduce TISCI Interrupt router bindings gpio: thunderx: Use the default parent apis for {request,release}_resources genirq: Introduce irq_chip_{request,release}_resource_parent() apis firmware: ti_sci: Add helper apis to manage resources firmware: ti_sci: Add RM mapping table for am654 firmware: ti_sci: Add support for IRQ management firmware: ti_sci: Add support for RM core ops ...
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Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
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Texas Instruments K3 Interrupt Aggregator | ||
========================================= | ||
|
||
The Interrupt Aggregator (INTA) provides a centralized machine | ||
which handles the termination of system events to that they can | ||
be coherently processed by the host(s) in the system. A maximum | ||
of 64 events can be mapped to a single interrupt. | ||
|
||
|
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Interrupt Aggregator | ||
+-----------------------------------------+ | ||
| Intmap VINT | | ||
| +--------------+ +------------+ | | ||
m ------>| | vint | bit | | 0 |.....|63| vint0 | | ||
. | +--------------+ +------------+ | +------+ | ||
. | . . | | HOST | | ||
Globalevents ------>| . . |------>| IRQ | | ||
. | . . | | CTRL | | ||
. | . . | +------+ | ||
n ------>| +--------------+ +------------+ | | ||
| | vint | bit | | 0 |.....|63| vintx | | ||
| +--------------+ +------------+ | | ||
| | | ||
+-----------------------------------------+ | ||
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||
Configuration of these Intmap registers that maps global events to vint is done | ||
by a system controller (like the Device Memory and Security Controller on K3 | ||
AM654 SoC). Driver should request the system controller to get the range | ||
of global events and vints assigned to the requesting host. Management | ||
of these requested resources should be handled by driver and requests | ||
system controller to map specific global event to vint, bit pair. | ||
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||
Communication between the host processor running an OS and the system | ||
controller happens through a protocol called TI System Control Interface | ||
(TISCI protocol). For more details refer: | ||
Documentation/devicetree/bindings/arm/keystone/ti,sci.txt | ||
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TISCI Interrupt Aggregator Node: | ||
------------------------------- | ||
- compatible: Must be "ti,sci-inta". | ||
- reg: Should contain registers location and length. | ||
- interrupt-controller: Identifies the node as an interrupt controller | ||
- msi-controller: Identifies the node as an MSI controller. | ||
- interrupt-parent: phandle of irq parent. | ||
- ti,sci: Phandle to TI-SCI compatible System controller node. | ||
- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator. | ||
- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta | ||
outputs) range within this INTA, assigned to the | ||
requesting host context. | ||
- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the | ||
global events range reaching this IA and are assigned | ||
to the requesting host context. | ||
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||
Example: | ||
-------- | ||
main_udmass_inta: interrupt-controller@33d00000 { | ||
compatible = "ti,sci-inta"; | ||
reg = <0x0 0x33d00000 0x0 0x100000>; | ||
interrupt-controller; | ||
msi-controller; | ||
interrupt-parent = <&main_navss_intr>; | ||
ti,sci = <&dmsc>; | ||
ti,sci-dev-id = <179>; | ||
ti,sci-rm-range-vint = <0x0>; | ||
ti,sci-rm-range-global-event = <0x1>; | ||
}; |
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Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
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Texas Instruments K3 Interrupt Router | ||
===================================== | ||
|
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The Interrupt Router (INTR) module provides a mechanism to mux M | ||
interrupt inputs to N interrupt outputs, where all M inputs are selectable | ||
to be driven per N output. An Interrupt Router can either handle edge triggered | ||
or level triggered interrupts and that is fixed in hardware. | ||
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Interrupt Router | ||
+----------------------+ | ||
| Inputs Outputs | | ||
+-------+ | +------+ +-----+ | | ||
| GPIO |----------->| | irq0 | | 0 | | Host IRQ | ||
+-------+ | +------+ +-----+ | controller | ||
| . . | +-------+ | ||
+-------+ | . . |----->| IRQ | | ||
| INTA |----------->| . . | +-------+ | ||
+-------+ | . +-----+ | | ||
| +------+ | N | | | ||
| | irqM | +-----+ | | ||
| +------+ | | ||
| | | ||
+----------------------+ | ||
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There is one register per output (MUXCNTL_N) that controls the selection. | ||
Configuration of these MUXCNTL_N registers is done by a system controller | ||
(like the Device Memory and Security Controller on K3 AM654 SoC). System | ||
controller will keep track of the used and unused registers within the Router. | ||
Driver should request the system controller to get the range of GIC IRQs | ||
assigned to the requesting hosts. It is the drivers responsibility to keep | ||
track of Host IRQs. | ||
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||
Communication between the host processor running an OS and the system | ||
controller happens through a protocol called TI System Control Interface | ||
(TISCI protocol). For more details refer: | ||
Documentation/devicetree/bindings/arm/keystone/ti,sci.txt | ||
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TISCI Interrupt Router Node: | ||
---------------------------- | ||
Required Properties: | ||
- compatible: Must be "ti,sci-intr". | ||
- ti,intr-trigger-type: Should be one of the following: | ||
1: If intr supports edge triggered interrupts. | ||
4: If intr supports level triggered interrupts. | ||
- interrupt-controller: Identifies the node as an interrupt controller | ||
- #interrupt-cells: Specifies the number of cells needed to encode an | ||
interrupt source. The value should be 2. | ||
First cell should contain the TISCI device ID of source | ||
Second cell should contain the interrupt source offset | ||
within the device. | ||
- ti,sci: Phandle to TI-SCI compatible System controller node. | ||
- ti,sci-dst-id: TISCI device ID of the destination IRQ controller. | ||
- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs | ||
assigned to this interrupt router. Each subtype id | ||
corresponds to a range of host irqs. | ||
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For more details on TISCI IRQ resource management refer: | ||
http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html | ||
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Example: | ||
-------- | ||
The following example demonstrates both interrupt router node and the consumer | ||
node(main gpio) on the AM654 SoC: | ||
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main_intr: interrupt-controller0 { | ||
compatible = "ti,sci-intr"; | ||
ti,intr-trigger-type = <1>; | ||
interrupt-controller; | ||
interrupt-parent = <&gic500>; | ||
#interrupt-cells = <2>; | ||
ti,sci = <&dmsc>; | ||
ti,sci-dst-id = <56>; | ||
ti,sci-rm-range-girq = <0x1>; | ||
}; | ||
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main_gpio0: gpio@600000 { | ||
... | ||
interrupt-parent = <&main_intr>; | ||
interrupts = <57 256>, <57 257>, <57 258>, | ||
<57 259>, <57 260>, <57 261>; | ||
... | ||
}; |
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@@ -15547,6 +15547,12 @@ F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt | |
F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt | ||
F: drivers/clk/keystone/sci-clk.c | ||
F: drivers/reset/reset-ti-sci.c | ||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt | ||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt | ||
F: drivers/irqchip/irq-ti-sci-intr.c | ||
F: drivers/irqchip/irq-ti-sci-inta.c | ||
F: include/linux/soc/ti/ti_sci_inta_msi.h | ||
F: drivers/soc/ti/ti_sci_inta_msi.c | ||
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Texas Instruments ASoC drivers | ||
M: Peter Ujfalusi <[email protected]> | ||
|
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