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Merge tag 'timers-core-2022-06-05' of git://git.kernel.org/pub/scm/li…
…nux/kernel/git/tip/tip Pull clockevent/clocksource updates from Thomas Gleixner: - Device tree bindings for MT8186 - Tell the kernel that the RISC-V SBI timer stops in deeper power states - Make device tree parsing in sp804 more robust - Dead code removal and tiny fixes here and there - Add the missing SPDX identifiers * tag 'timers-core-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/oxnas-rps: Fix irq_of_parse_and_map() return value clocksource/drivers/timer-ti-dm: Remove unnecessary NULL check clocksource/drivers/timer-sun5i: Convert to SPDX identifier clocksource/drivers/timer-sun4i: Convert to SPDX identifier clocksource/drivers/pistachio: Convert to SPDX identifier clocksource/drivers/orion: Convert to SPDX identifier clocksource/drivers/lpc32xx: Convert to SPDX identifier clocksource/drivers/digicolor: Convert to SPDX identifier clocksource/drivers/armada-370-xp: Convert to SPDX identifier clocksource/drivers/mips-gic-timer: Convert to SPDX identifier clocksource/drivers/jcore: Convert to SPDX identifier clocksource/drivers/bcm_kona: Convert to SPDX identifier clocksource/drivers/sp804: Avoid error on multiple instances clocksource/drivers/riscv: Events are stopped during CPU suspend clocksource/drivers/ixp4xx: Drop boardfile probe path dt-bindings: timer: Add compatible for Mediatek MT8186
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Marvell Armada 370/XP SoC timer handling. | ||
* | ||
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@@ -7,10 +8,6 @@ | |
* Gregory CLEMENT <[email protected]> | ||
* Thomas Petazzoni <[email protected]> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
* | ||
* Timer 0 is used as free-running clocksource, while timer 1 is | ||
* used as clock_event_device. | ||
* | ||
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Conexant Digicolor timer driver | ||
* | ||
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@@ -11,10 +12,6 @@ | |
* Copyright (C) 2013 Maxime Ripard | ||
* | ||
* Maxime Ripard <[email protected]> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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/* | ||
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@@ -1,12 +1,9 @@ | ||
// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Marvell Orion SoC timer handling. | ||
* | ||
* Sebastian Hesselbarth <[email protected]> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
* | ||
* Timer 0 is used as free-running clocksource, while timer 1 is | ||
* used as clock_event_device. | ||
*/ | ||
|
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Allwinner A1X SoCs timer handling. | ||
* | ||
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* Based on code from | ||
* Allwinner Technology Co., Ltd. <www.allwinnertech.com> | ||
* Benn Huang <[email protected]> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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#include <linux/clk.h> | ||
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Allwinner SoCs hstimer driver. | ||
* | ||
* Copyright (C) 2013 Maxime Ripard | ||
* | ||
* Maxime Ripard <[email protected]> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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#include <linux/clk.h> | ||
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