hpt366: fix clock turnaround

DPLL clock (0x21) should be used for writes and PCI clock (0x23) for reads, not vice versa. Signed-off-by: Sergei Shtylyov <[email protected]> Signed-off-by: David S. Miller <[email protected]>
chewitt · Oct 26, 2010 · bbe54d7 · bbe54d7
1 parent 5d3f1a4
commit bbe54d7
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
@@ -838,7 +838,7 @@ static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
 
 static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
 {
-	hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x23 : 0x21);
+	hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23);
 }
 
 /**