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Merge tag 'media/v5.13-1' of git://git.kernel.org/pub/scm/linux/kerne…
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…l/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - addition of a maintainer's profile for the media subsystem

 - addition of i.MX8 IP support

 - qcom/camss gained support for hardware version Titan 170

 - new RC keymaps

 - Lots of other improvements, cleanups and bug fixes

* tag 'media/v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (488 commits)
  media: coda: fix macroblocks count control usage
  media: rkisp1: params: fix wrong bits settings
  media: cedrus: Fix H265 status definitions
  media: meson-ge2d: fix rotation parameters
  media: v4l2-ctrls: fix reference to freed memory
  media: venus : hfi: add venus image info into smem
  media: venus: Fix internal buffer size calculations for v6.
  media: venus: helpers: keep max bandwidth when mbps exceeds the supported range
  media: venus: fix hw overload error log condition
  media: venus: core: correct firmware name for sm8250
  media: venus: core,pm: fix potential infinite loop
  media: venus: core: Fix kerneldoc warnings
  media: gscpa/stv06xx: fix memory leak
  media: cx25821: remove unused including <linux/version.h>
  media: staging: media/meson: remove redundant dev_err call
  media: adv7842: support 1 block EDIDs, fix clearing EDID
  media: adv7842: configure all pads
  media: allegro: change kernel-doc comment blocks to normal comments
  media: camss: ispif: Remove redundant dev_err call in msm_ispif_subdev_init()
  media: i2c: rdamc21: Fix warning on u8 cast
  ...
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torvalds committed Apr 28, 2021
2 parents acd3d28 + 0b276e4 commit 3aa139a
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ Required properties (DMA function blocks):
- larb: Should contain a phandle pointing to the local arbiter device as defined
in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
- iommus: Should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.

Optional properties (RDMA function blocks):
Expand Down
6 changes: 3 additions & 3 deletions Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt
Original file line number Diff line number Diff line change
Expand Up @@ -10,19 +10,19 @@ Required properties:
- reg: I3C master registers

Mandatory properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):

- #address-cells: shall be set to 1
- #size-cells: shall be set to 0

Optional properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):

- i2c-scl-hz
- i3c-scl-hz

I3C device connected on the bus follow the generic description (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details).
Documentation/devicetree/bindings/i3c/i3c.yaml for more details).

Example:

Expand Down
6 changes: 3 additions & 3 deletions Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
Original file line number Diff line number Diff line change
Expand Up @@ -9,19 +9,19 @@ Required properties:
- reg: Offset and length of I3C master registers

Mandatory properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):

- #address-cells: shall be set to 3
- #size-cells: shall be set to 0

Optional properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):

- i2c-scl-hz
- i3c-scl-hz

I3C device connected on the bus follow the generic description (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details).
Documentation/devicetree/bindings/i3c/i3c.yaml for more details).

Example:

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -20,16 +20,12 @@ properties:
- const: allwinner,sun5i-a13-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-a83t-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-r40-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun50i-a64-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun50i-h6-ir
- enum:
- allwinner,sun8i-a83t-ir
- allwinner,sun8i-r40-ir
- allwinner,sun50i-a64-ir
- allwinner,sun50i-h6-ir
- allwinner,sun50i-h616-ir
- const: allwinner,sun6i-a31-ir

reg:
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ Required properties:
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.

Example:
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ Required properties:
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.

Example:
Expand Down
2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/media/mediatek-mdp.txt
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@ Required properties (DMA function blocks, child node):
"mediatek,mt8173-mdp-wdma"
"mediatek,mt8173-mdp-wrot"
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
- mediatek,larb: must contain the local arbiters in the current Socs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
Expand Down
57 changes: 30 additions & 27 deletions Documentation/devicetree/bindings/media/mediatek-vcodec.txt
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,9 @@ Mediatek Video Codec is the video codec hw present in Mediatek SoCs which
supports high resolution encoding and decoding functionalities.

Required properties:
- compatible : "mediatek,mt8173-vcodec-enc" for MT8173 encoder
- compatible : must be one of the following string:
"mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder.
"mediatek,mt8173-vcodec-enc" for mt8173 avc encoder.
"mediatek,mt8183-vcodec-enc" for MT8183 encoder.
"mediatek,mt8173-vcodec-dec" for MT8173 decoder.
- reg : Physical base address of the video codec registers and length of
Expand All @@ -13,12 +15,12 @@ Required properties:
- mediatek,larb : must contain the local arbiters in the current Socs.
- clocks : list of clock specifiers, corresponding to entries in
the clock-names property.
- clock-names: encoder must contain "venc_sel_src", "venc_sel",,
"venc_lt_sel_src", "venc_lt_sel", decoder must contain "vcodecpll",
"univpll_d2", "clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll",
"venc_lt_sel", "vdec_bus_clk_src".
- clock-names: avc encoder must contain "venc_sel", vp8 encoder must
contain "venc_lt_sel", decoder must contain "vcodecpll", "univpll_d2",
"clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll", "venc_lt_sel",
"vdec_bus_clk_src".
- iommus : should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
One of the two following nodes:
- mediatek,vpu : the node of the video processor unit, if using VPU.
Expand Down Expand Up @@ -80,14 +82,10 @@ vcodec_dec: vcodec@16000000 {
assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;
};

vcodec_enc: vcodec@18002000 {
vcodec_enc_avc: vcodec@18002000 {
compatible = "mediatek,mt8173-vcodec-enc";
reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/
<0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
mediatek,larb = <&larb3>,
<&larb5>;
reg = <0 0x18002000 0 0x1000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
iommus = <&iommu M4U_PORT_VENC_RCPU>,
<&iommu M4U_PORT_VENC_REC>,
<&iommu M4U_PORT_VENC_BSDMA>,
Expand All @@ -98,8 +96,20 @@ vcodec_dec: vcodec@16000000 {
<&iommu M4U_PORT_VENC_REF_LUMA>,
<&iommu M4U_PORT_VENC_REF_CHROMA>,
<&iommu M4U_PORT_VENC_NBM_RDMA>,
<&iommu M4U_PORT_VENC_NBM_WDMA>,
<&iommu M4U_PORT_VENC_RCPU_SET2>,
<&iommu M4U_PORT_VENC_NBM_WDMA>;
mediatek,larb = <&larb3>;
mediatek,vpu = <&vpu>;
clocks = <&topckgen CLK_TOP_VENC_SEL>;
clock-names = "venc_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
};

vcodec_enc_vp8: vcodec@19002000 {
compatible = "mediatek,mt8173-vcodec-enc-vp8";
reg = <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
<&iommu M4U_PORT_VENC_REC_FRM_SET2>,
<&iommu M4U_PORT_VENC_BSDMA_SET2>,
<&iommu M4U_PORT_VENC_SV_COMA_SET2>,
Expand All @@ -108,17 +118,10 @@ vcodec_dec: vcodec@16000000 {
<&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>,
<&iommu M4U_PORT_VENC_REF_LUMA_SET2>,
<&iommu M4U_PORT_VENC_REC_CHROMA_SET2>;
mediatek,larb = <&larb5>;
mediatek,vpu = <&vpu>;
clocks = <&topckgen CLK_TOP_VENCPLL_D2>,
<&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_UNIVPLL1_D2>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "venc_sel_src",
"venc_sel",
"venc_lt_sel_src",
"venc_lt_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>,
<&topckgen CLK_TOP_UNIVPLL1_D2>;
clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "venc_lt_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
};
108 changes: 51 additions & 57 deletions Documentation/devicetree/bindings/media/nxp,imx7-mipi-csi2.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,19 @@
$id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX7 Mipi CSI2
title: NXP i.MX7 MIPI CSI-2 receiver

maintainers:
- Rui Miguel Silva <[email protected]>

description: |
This is the device node for the MIPI CSI-2 receiver core in i.MX7 soc. It is
compatible with previous version of samsung d-phy.
description: |-
The NXP i.MX7 SoC family includes a MIPI CSI-2 receiver IP core, documented
as "CSIS V3.3". The IP core seems to originate from Samsung, and may be
compatible with some of the Exynos4 ad S5P SoCs.
While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
completely wrapped by the CSIS and doesn't expose a control interface of its
own. This binding thus covers both IP cores.
properties:
compatible:
Expand All @@ -24,8 +29,10 @@ properties:
maxItems: 1

clocks:
minItems: 3
maxItems: 3
items:
- description: The peripheral clock (a.k.a. APB clock)
- description: The external clock (optionally used as the pixel clock)
- description: The MIPI D-PHY clock

clock-names:
items:
Expand All @@ -37,26 +44,16 @@ properties:
maxItems: 1

phy-supply:
description:
Phandle to a regulator that provides power to the PHY. This
regulator will be managed during the PHY power on/off sequence.
description: The MIPI D-PHY digital power supply

resets:
maxItems: 1

reset-names:
const: mrst
items:
- description: MIPI D-PHY slave reset

clock-frequency:
description:
The IP main (system bus) clock frequency in Hertz
description: The desired external clock ("wrap") frequency, in Hz
default: 166000000

fsl,csis-hs-settle:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Differential receiver (HS-RX) settle time

ports:
$ref: /schemas/graph.yaml#/properties/ports

Expand Down Expand Up @@ -98,7 +95,6 @@ required:
- power-domains
- phy-supply
- resets
- reset-names
- ports

additionalProperties: false
Expand All @@ -111,43 +107,41 @@ examples:
#include <dt-bindings/reset/imx7-reset.h>
mipi_csi: mipi-csi@30750000 {
compatible = "fsl,imx7-mipi-csi2";
reg = <0x30750000 0x10000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_IPG_ROOT_CLK>,
<&clks IMX7D_MIPI_CSI_ROOT_CLK>,
<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
clock-names = "pclk", "wrap", "phy";
clock-frequency = <166000000>;
power-domains = <&pgc_mipi_phy>;
phy-supply = <&reg_1p0d>;
resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
reset-names = "mrst";
fsl,csis-hs-settle = <3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_from_sensor: endpoint {
remote-endpoint = <&ov2680_to_mipi>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
mipi_vc0_to_csi_mux: endpoint {
remote-endpoint = <&csi_mux_from_mipi_vc0>;
};
};
compatible = "fsl,imx7-mipi-csi2";
reg = <0x30750000 0x10000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_IPG_ROOT_CLK>,
<&clks IMX7D_MIPI_CSI_ROOT_CLK>,
<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
clock-names = "pclk", "wrap", "phy";
clock-frequency = <166000000>;
power-domains = <&pgc_mipi_phy>;
phy-supply = <&reg_1p0d>;
resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_from_sensor: endpoint {
remote-endpoint = <&ov2680_to_mipi>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
mipi_vc0_to_csi_mux: endpoint {
remote-endpoint = <&csi_mux_from_mipi_vc0>;
};
};
};
};
...
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