JEFF 74x157 EXAMPLE

Quad 2-line to 1-line data selector/multiplexer, non-inverting outputs. Based on the 7400-series integrated circuits used in my programable_8_bit_microprocessor.

Table of Contents

• OVERVIEW
• SCHEMATIC
• TRUTH TABLE
• VERILOG CODE
• RUN (SIMULATE)
• VIEW WAVEFORM
• TESTED IN HARDWARE - BURNED TO A FPGA

OVERVIEW

I used iverilog to simulate and GTKWave to view the waveform. I also used Xilinx Vivado to synthesize and program this example on a Digilent ARTY-S7 FPGA development board.

SCHEMATIC

This figure was created using LaTeX in my-latex-graphs repo.

TRUTH TABLE

en	s	a	b	y
0	0	xxxx	xxxx	0000
1	0	a	xxxx	a
1	1	xxxx	b	b

VERILOG CODE

The jeff_74x157.v behavioral model,

    // ALWAYS BLOCK with NON-BLOCKING PROCEDURAL ASSIGNMENT STATEMENT
    always @ ( * ) begin
        if (~en) begin
            y <= 4'h0;
        end else begin
            case(s)
                1'b0 : y <= a;
                1'b1 : y <= b;
            endcase
        end
    end

RUN (SIMULATE)

The testbench uses two files,

• jeff_74x157_tb.v the testbench
• jeff_74x157_tb.tv the test vectors and expected results

with,

• jeff_74x157.vh is the header file listing the verilog models
• run-simulation.sh is a script containing the commands below

Use iverilog to compile the verilog to a vvp format which is used by the vvp runtime simulation engine,

iverilog -o jeff_74x157_tb.vvp jeff_74x157_tb.v jeff_74x157.vh

Use vvp to run the simulation, which checks the UUT and creates a waveform dump file *.vcd.

vvp jeff_74x157_tb.vvp

The output of the test,

TEST START --------------------------------

                 | TIME(ns) | EN | S |  A   |  B   |  Y   |
                 ------------------------------------------
   1        INIT |       15 | 0  | 0 | xxxx | xxxx | 0000 |
   2           - |       35 | 0  | 0 | xxxx | xxxx | 0000 |
   3           - |       55 | 1  | 0 | 0000 | xxxx | 0000 |
   4           - |       75 | 1  | 0 | 0101 | xxxx | 0101 |
   5           - |       95 | 1  | 0 | 1010 | xxxx | 1010 |
   6           - |      115 | 1  | 0 | 1111 | xxxx | 1111 |
   7           - |      135 | 1  | 1 | xxxx | 0000 | 0000 |
   8           - |      155 | 1  | 1 | xxxx | 0101 | 0101 |
   9           - |      175 | 1  | 1 | xxxx | 1010 | 1010 |
  10           - |      195 | 1  | 1 | xxxx | 1111 | 1111 |

 VECTORS:   10
  ERRORS:    0

TEST END ----------------------------------

VIEW WAVEFORM

Open the waveform file jeff_74x157_tb.vcd file with GTKWave,

gtkwave -f jeff_74x157_tb.vcd &

Save your waveform to a .gtkw file.

Now you can use the script launch-gtkwave.sh anytime you want,

gtkwave -f jeff_74x157_tb.gtkw &

TESTED IN HARDWARE - BURNED TO A FPGA

The above code was synthesized using the Xilinx Vivado IDE software suite and burned to a FPGA development board.