Support mmap by rearrange virtual memory space

[coolyjg]

• Support mmap with anonymous mapping and file mapping.
• Rearrange virtual memory space.
• Support swap mechanism.
• Multi-architecture:
  • X86_64
  • AArch64
  • RiscV64

[coolyjg]

#82 #83

[coolyjg]

#96

[ken4647]

There is a problem for x86_64：x86_64 has the problem of inconsistency TLB for multi-core cpu after tlb_flush(). Generally, IPI (inter-core interrupt) can be considered to solve it. However, RuxOS doesn't support it so far.

[ken4647]

Another problem is there is a actually small virtual memory space between phys-memory-base(0) and the begin of mmio-regions(0xb000_0000) for x86_64. Therefore, under the default configuration, only a maximum of 3GB of physical memory is supported.

# Base address of the whole physical memory.
phys-memory-base = "0"
# Size of the whole physical memory.
# phys-memory-size = "0x800_0000"     # 128M
phys-memory-size = "0x8000_0000"     # 2G
# Base physical address of the kernel image.
kernel-base-paddr = "0x20_0000"
# Base virtual address of the kernel image.
kernel-base-vaddr = "0xffff_ff80_0020_0000"
# virtual start address of the mapping memory.
mmap-start-vaddr = "0xffff_8000_0000_0000"
# virtual end address of the mapping memory.
mmap-end-vaddr = "0xffff_f000_0000_0000"
# Linear mapping offset, for quick conversions between physical and virtual
# addresses.
phys-virt-offset = "0xffff_ff80_0000_0000"
# MMIO regions with format (`base_paddr`, `size`).
mmio-regions = [
    ["0xb000_0000", "0x1000_0000"], # PCI config space
    ["0xfe00_0000", "0xc0_0000"],   # PCI devices
    ["0xfec0_0000", "0x1000"],      # IO APIC
    ["0xfed0_0000", "0x1000"],      # HPET
    ["0xfee0_0000", "0x1000"],      # Local APIC
]