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gdth.c
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gdth.c
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/************************************************************************
* Linux driver for *
* ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
* Intel Corporation: Storage RAID Controllers *
* *
* gdth.c *
* Copyright (C) 1995-04 ICP vortex GmbH, Achim Leubner *
* Copyright (C) 2002-04 Intel Corporation *
* Copyright (C) 2003-04 Adaptec Inc. *
* <[email protected]> *
* *
* Additions/Fixes: *
* Boji Tony Kannanthanam <[email protected]> *
* Johannes Dinner <[email protected]> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published *
* by the Free Software Foundation; either version 2 of the License, *
* or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this kernel; if not, write to the Free Software *
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
* *
* Linux kernel 2.2.x, 2.4.x, 2.6.x supported *
* *
* $Log: gdth.c,v $
* Revision 1.73 2004/03/31 13:33:03 achim
* Special command 0xfd implemented to detect 64-bit DMA support
*
* Revision 1.72 2004/03/17 08:56:04 achim
* 64-bit DMA only enabled if FW >= x.43
*
* Revision 1.71 2004/03/05 15:51:29 achim
* Screen service: separate message buffer, bugfixes
*
* Revision 1.70 2004/02/27 12:19:07 achim
* Bugfix: Reset bit in config (0xfe) call removed
*
* Revision 1.69 2004/02/20 09:50:24 achim
* Compatibility changes for kernels < 2.4.20
* Bugfix screen service command size
* pci_set_dma_mask() error handling added
*
* Revision 1.68 2004/02/19 15:46:54 achim
* 64-bit DMA bugfixes
* Drive size bugfix for drives > 1TB
*
* Revision 1.67 2004/01/14 13:11:57 achim
* Tool access over /proc no longer supported
* Bugfixes IOCTLs
*
* Revision 1.66 2003/12/19 15:04:06 achim
* Bugfixes support for drives > 2TB
*
* Revision 1.65 2003/12/15 11:21:56 achim
* 64-bit DMA support added
* Support for drives > 2 TB implemented
* Kernels 2.2.x, 2.4.x, 2.6.x supported
*
* Revision 1.64 2003/09/17 08:30:26 achim
* EISA/ISA controller scan disabled
* Command line switch probe_eisa_isa added
*
* Revision 1.63 2003/07/12 14:01:00 Daniele Bellucci <[email protected]>
* Minor cleanups in gdth_ioctl.
*
* Revision 1.62 2003/02/27 15:01:59 achim
* Dynamic DMA mapping implemented
* New (character device) IOCTL interface added
* Other controller related changes made
*
* Revision 1.61 2002/11/08 13:09:52 boji
* Added support for XSCALE based RAID Controllers
* Fixed SCREENSERVICE initialization in SMP cases
* Added checks for gdth_polling before GDTH_HA_LOCK
*
* Revision 1.60 2002/02/05 09:35:22 achim
* MODULE_LICENSE only if kernel >= 2.4.11
*
* Revision 1.59 2002/01/30 09:46:33 achim
* Small changes
*
* Revision 1.58 2002/01/29 15:30:02 achim
* Set default value of shared_access to Y
* New status S_CACHE_RESERV for clustering added
*
* Revision 1.57 2001/08/21 11:16:35 achim
* Bugfix free_irq()
*
* Revision 1.56 2001/08/09 11:19:39 achim
* struct scsi_host_template changes
*
* Revision 1.55 2001/08/09 10:11:28 achim
* Command HOST_UNFREEZE_IO before cache service init.
*
* Revision 1.54 2001/07/20 13:48:12 achim
* Expand: gdth_analyse_hdrive() removed
*
* Revision 1.53 2001/07/17 09:52:49 achim
* Small OEM related change
*
* Revision 1.52 2001/06/19 15:06:20 achim
* New host command GDT_UNFREEZE_IO added
*
* Revision 1.51 2001/05/22 06:42:37 achim
* PCI: Subdevice ID added
*
* Revision 1.50 2001/05/17 13:42:16 achim
* Support for Intel Storage RAID Controllers added
*
* Revision 1.50 2001/05/17 12:12:34 achim
* Support for Intel Storage RAID Controllers added
*
* Revision 1.49 2001/03/15 15:07:17 achim
* New __setup interface for boot command line options added
*
* Revision 1.48 2001/02/06 12:36:28 achim
* Bugfix Cluster protocol
*
* Revision 1.47 2001/01/10 14:42:06 achim
* New switch shared_access added
*
* Revision 1.46 2001/01/09 08:11:35 achim
* gdth_command() removed
* meaning of Scsi_Pointer members changed
*
* Revision 1.45 2000/11/16 12:02:24 achim
* Changes for kernel 2.4
*
* Revision 1.44 2000/10/11 08:44:10 achim
* Clustering changes: New flag media_changed added
*
* Revision 1.43 2000/09/20 12:59:01 achim
* DPMEM remap functions for all PCI controller types implemented
* Small changes for ia64 platform
*
* Revision 1.42 2000/07/20 09:04:50 achim
* Small changes for kernel 2.4
*
* Revision 1.41 2000/07/04 14:11:11 achim
* gdth_analyse_hdrive() added to rescan drives after online expansion
*
* Revision 1.40 2000/06/27 11:24:16 achim
* Changes Clustering, Screenservice
*
* Revision 1.39 2000/06/15 13:09:04 achim
* Changes for gdth_do_cmd()
*
* Revision 1.38 2000/06/15 12:08:43 achim
* Bugfix gdth_sync_event(), service SCREENSERVICE
* Data direction for command 0xc2 changed to DOU
*
* Revision 1.37 2000/05/25 13:50:10 achim
* New driver parameter virt_ctr added
*
* Revision 1.36 2000/05/04 08:50:46 achim
* Event buffer now in gdth_ha_str
*
* Revision 1.35 2000/03/03 10:44:08 achim
* New event_string only valid for the RP controller family
*
* Revision 1.34 2000/03/02 14:55:29 achim
* New mechanism for async. event handling implemented
*
* Revision 1.33 2000/02/21 15:37:37 achim
* Bugfix Alpha platform + DPMEM above 4GB
*
* Revision 1.32 2000/02/14 16:17:37 achim
* Bugfix sense_buffer[] + raw devices
*
* Revision 1.31 2000/02/10 10:29:00 achim
* Delete sense_buffer[0], if command OK
*
* Revision 1.30 1999/11/02 13:42:39 achim
* ARRAY_DRV_LIST2 implemented
* Now 255 log. and 100 host drives supported
*
* Revision 1.29 1999/10/05 13:28:47 achim
* GDT_CLUST_RESET added
*
* Revision 1.28 1999/08/12 13:44:54 achim
* MOUNTALL removed
* Cluster drives -> removeable drives
*
* Revision 1.27 1999/06/22 07:22:38 achim
* Small changes
*
* Revision 1.26 1999/06/10 16:09:12 achim
* Cluster Host Drive support: Bugfixes
*
* Revision 1.25 1999/06/01 16:03:56 achim
* gdth_init_pci(): Manipulate config. space to start RP controller
*
* Revision 1.24 1999/05/26 11:53:06 achim
* Cluster Host Drive support added
*
* Revision 1.23 1999/03/26 09:12:31 achim
* Default value for hdr_channel set to 0
*
* Revision 1.22 1999/03/22 16:27:16 achim
* Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
*
* Revision 1.21 1999/03/16 13:40:34 achim
* Problems with reserved drives solved
* gdth_eh_bus_reset() implemented
*
* Revision 1.20 1999/03/10 09:08:13 achim
* Bugfix: Corrections in gdth_direction_tab[] made
* Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
*
* Revision 1.19 1999/03/05 14:38:16 achim
* Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
* -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
* INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
* with BIOS disabled and memory test set to Intensive
* Enhanced /proc support
*
* Revision 1.18 1999/02/24 09:54:33 achim
* Command line parameter hdr_channel implemented
* Bugfix for EISA controllers + Linux 2.2.x
*
* Revision 1.17 1998/12/17 15:58:11 achim
* Command line parameters implemented
* Changes for Alpha platforms
* PCI controller scan changed
* SMP support improved (spin_lock_irqsave(),...)
* New async. events, new scan/reserve commands included
*
* Revision 1.16 1998/09/28 16:08:46 achim
* GDT_PCIMPR: DPMEM remapping, if required
* mdelay() added
*
* Revision 1.15 1998/06/03 14:54:06 achim
* gdth_delay(), gdth_flush() implemented
* Bugfix: gdth_release() changed
*
* Revision 1.14 1998/05/22 10:01:17 achim
* mj: pcibios_strerror() removed
* Improved SMP support (if version >= 2.1.95)
* gdth_halt(): halt_called flag added (if version < 2.1)
*
* Revision 1.13 1998/04/16 09:14:57 achim
* Reserve drives (for raw service) implemented
* New error handling code enabled
* Get controller name from board_info() IOCTL
* Final round of PCI device driver patches by Martin Mares
*
* Revision 1.12 1998/03/03 09:32:37 achim
* Fibre channel controller support added
*
* Revision 1.11 1998/01/27 16:19:14 achim
* SA_SHIRQ added
* add_timer()/del_timer() instead of GDTH_TIMER
* scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
* New error handling included
*
* Revision 1.10 1997/10/31 12:29:57 achim
* Read heads/sectors from host drive
*
* Revision 1.9 1997/09/04 10:07:25 achim
* IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
* register_reboot_notifier() to get a notify on shutown used
*
* Revision 1.8 1997/04/02 12:14:30 achim
* Version 1.00 (see gdth.h), tested with kernel 2.0.29
*
* Revision 1.7 1997/03/12 13:33:37 achim
* gdth_reset() changed, new async. events
*
* Revision 1.6 1997/03/04 14:01:11 achim
* Shutdown routine gdth_halt() implemented
*
* Revision 1.5 1997/02/21 09:08:36 achim
* New controller included (RP, RP1, RP2 series)
* IOCTL interface implemented
*
* Revision 1.4 1996/07/05 12:48:55 achim
* Function gdth_bios_param() implemented
* New constant GDTH_MAXC_P_L inserted
* GDT_WRITE_THR, GDT_EXT_INFO implemented
* Function gdth_reset() changed
*
* Revision 1.3 1996/05/10 09:04:41 achim
* Small changes for Linux 1.2.13
*
* Revision 1.2 1996/05/09 12:45:27 achim
* Loadable module support implemented
* /proc support corrections made
*
* Revision 1.1 1996/04/11 07:35:57 achim
* Initial revision
*
************************************************************************/
/* All GDT Disk Array Controllers are fully supported by this driver.
* This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
* PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
* list of all controller types.
*
* If you have one or more GDT3000/3020 EISA controllers with
* controller BIOS disabled, you have to set the IRQ values with the
* command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
* the IRQ values for the EISA controllers.
*
* After the optional list of IRQ values, other possible
* command line options are:
* disable:Y disable driver
* disable:N enable driver
* reserve_mode:0 reserve no drives for the raw service
* reserve_mode:1 reserve all not init., removable drives
* reserve_mode:2 reserve all not init. drives
* reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
* h- controller no., b- channel no.,
* t- target ID, l- LUN
* reverse_scan:Y reverse scan order for PCI controllers
* reverse_scan:N scan PCI controllers like BIOS
* max_ids:x x - target ID count per channel (1..MAXID)
* rescan:Y rescan all channels/IDs
* rescan:N use all devices found until now
* virt_ctr:Y map every channel to a virtual controller
* virt_ctr:N use multi channel support
* hdr_channel:x x - number of virtual bus for host drives
* shared_access:Y disable driver reserve/release protocol to
* access a shared resource from several nodes,
* appropiate controller firmware required
* shared_access:N enable driver reserve/release protocol
* probe_eisa_isa:Y scan for EISA/ISA controllers
* probe_eisa_isa:N do not scan for EISA/ISA controllers
* force_dma32:Y use only 32 bit DMA mode
* force_dma32:N use 64 bit DMA mode, if supported
*
* The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
* max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
* shared_access:Y,probe_eisa_isa:N,force_dma32:N".
* Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
*
* When loading the gdth driver as a module, the same options are available.
* You can set the IRQs with "IRQ=...". However, the syntax to specify the
* options changes slightly. You must replace all ',' between options
* with ' ' and all ':' with '=' and you must use
* '1' in place of 'Y' and '0' in place of 'N'.
*
* Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
* max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
* probe_eisa_isa=0 force_dma32=0"
* The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
*/
/* The meaning of the Scsi_Pointer members in this driver is as follows:
* ptr: Chaining
* this_residual: Command priority
* buffer: phys. DMA sense buffer
* dma_handle: phys. DMA buffer (kernel >= 2.4.0)
* buffers_residual: Timeout value
* Status: Command status (gdth_do_cmd()), DMA mem. mappings
* Message: Additional info (gdth_do_cmd()), DMA direction
* have_data_in: Flag for gdth_wait_completion()
* sent_command: Opcode special command
* phase: Service/parameter/return code special command
*/
/* interrupt coalescing */
/* #define INT_COAL */
/* statistics */
#define GDTH_STATISTICS
#include <linux/module.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/in.h>
#include <linux/proc_fs.h>
#include <linux/time.h>
#include <linux/timer.h>
#ifdef GDTH_RTC
#include <linux/mc146818rtc.h>
#endif
#include <linux/reboot.h>
#include <asm/dma.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/spinlock.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#include <linux/blkdev.h>
#else
#include <linux/blk.h>
#include "sd.h"
#endif
#include "scsi.h"
#include <scsi/scsi_host.h>
#include "gdth.h"
#include "gdth_kcompat.h"
static void gdth_delay(int milliseconds);
static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
static irqreturn_t gdth_interrupt(int irq, void *dev_id, struct pt_regs *regs);
static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
static int gdth_async_event(int hanum);
static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
static void gdth_next(int hanum);
static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
ushort idx, gdth_evt_data *evt);
static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
gdth_evt_str *estr);
static void gdth_clear_events(void);
static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
char *buffer,ushort count);
static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
static int gdth_search_eisa(ushort eisa_adr);
static int gdth_search_isa(ulong32 bios_adr);
static int gdth_search_pci(gdth_pci_str *pcistr);
static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
ushort vendor, ushort dev);
static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
static void gdth_enable_int(int hanum);
static int gdth_get_status(unchar *pIStatus,int irq);
static int gdth_test_busy(int hanum);
static int gdth_get_cmd_index(int hanum);
static void gdth_release_event(int hanum);
static int gdth_wait(int hanum,int index,ulong32 time);
static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
ulong64 p2,ulong64 p3);
static int gdth_search_drives(int hanum);
static int gdth_analyse_hdrive(int hanum, ushort hdrive);
static const char *gdth_ctr_name(int hanum);
static int gdth_open(struct inode *inode, struct file *filep);
static int gdth_close(struct inode *inode, struct file *filep);
static int gdth_ioctl(struct inode *inode, struct file *filep,
unsigned int cmd, unsigned long arg);
static void gdth_flush(int hanum);
static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
#ifdef DEBUG_GDTH
static unchar DebugState = DEBUG_GDTH;
#ifdef __SERIAL__
#define MAX_SERBUF 160
static void ser_init(void);
static void ser_puts(char *str);
static void ser_putc(char c);
static int ser_printk(const char *fmt, ...);
static char strbuf[MAX_SERBUF+1];
#ifdef __COM2__
#define COM_BASE 0x2f8
#else
#define COM_BASE 0x3f8
#endif
static void ser_init()
{
unsigned port=COM_BASE;
outb(0x80,port+3);
outb(0,port+1);
/* 19200 Baud, if 9600: outb(12,port) */
outb(6, port);
outb(3,port+3);
outb(0,port+1);
/*
ser_putc('I');
ser_putc(' ');
*/
}
static void ser_puts(char *str)
{
char *ptr;
ser_init();
for (ptr=str;*ptr;++ptr)
ser_putc(*ptr);
}
static void ser_putc(char c)
{
unsigned port=COM_BASE;
while ((inb(port+5) & 0x20)==0);
outb(c,port);
if (c==0x0a)
{
while ((inb(port+5) & 0x20)==0);
outb(0x0d,port);
}
}
static int ser_printk(const char *fmt, ...)
{
va_list args;
int i;
va_start(args,fmt);
i = vsprintf(strbuf,fmt,args);
ser_puts(strbuf);
va_end(args);
return i;
}
#define TRACE(a) {if (DebugState==1) {ser_printk a;}}
#define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
#define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
#else /* !__SERIAL__ */
#define TRACE(a) {if (DebugState==1) {printk a;}}
#define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
#define TRACE3(a) {if (DebugState!=0) {printk a;}}
#endif
#else /* !DEBUG */
#define TRACE(a)
#define TRACE2(a)
#define TRACE3(a)
#endif
#ifdef GDTH_STATISTICS
static ulong32 max_rq=0, max_index=0, max_sg=0;
#ifdef INT_COAL
static ulong32 max_int_coal=0;
#endif
static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
static struct timer_list gdth_timer;
#endif
#define PTR2USHORT(a) (ushort)(ulong)(a)
#define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
#define INDEX_OK(i,t) ((i)<sizeof(t)/sizeof((t)[0]))
#define NUMDATA(a) ( (gdth_num_str *)((a)->hostdata))
#define HADATA(a) (&((gdth_ext_str *)((a)->hostdata))->haext)
#define CMDDATA(a) (&((gdth_ext_str *)((a)->hostdata))->cmdext)
#define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
#define gdth_readb(addr) readb(addr)
#define gdth_readw(addr) readw(addr)
#define gdth_readl(addr) readl(addr)
#define gdth_writeb(b,addr) writeb((b),(addr))
#define gdth_writew(b,addr) writew((b),(addr))
#define gdth_writel(b,addr) writel((b),(addr))
static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
static unchar gdth_polling; /* polling if TRUE */
static unchar gdth_from_wait = FALSE; /* gdth_wait() */
static int wait_index,wait_hanum; /* gdth_wait() */
static int gdth_ctr_count = 0; /* controller count */
static int gdth_ctr_vcount = 0; /* virt. ctr. count */
static int gdth_ctr_released = 0; /* gdth_release() */
static struct Scsi_Host *gdth_ctr_tab[MAXHA]; /* controller table */
static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS]; /* virt. ctr. table */
static unchar gdth_write_through = FALSE; /* write through */
static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
static int elastidx;
static int eoldidx;
static int major;
#define DIN 1 /* IN data direction */
#define DOU 2 /* OUT data direction */
#define DNO DIN /* no data transfer */
#define DUN DIN /* unknown data direction */
static unchar gdth_direction_tab[0x100] = {
DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
};
/* LILO and modprobe/insmod parameters */
/* IRQ list for GDT3000/3020 EISA controllers */
static int irq[MAXHA] __initdata =
{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
/* disable driver flag */
static int disable __initdata = 0;
/* reserve flag */
static int reserve_mode = 1;
/* reserve list */
static int reserve_list[MAX_RES_ARGS] =
{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
/* scan order for PCI controllers */
static int reverse_scan = 0;
/* virtual channel for the host drives */
static int hdr_channel = 0;
/* max. IDs per channel */
static int max_ids = MAXID;
/* rescan all IDs */
static int rescan = 0;
/* map channels to virtual controllers */
static int virt_ctr = 0;
/* shared access */
static int shared_access = 1;
/* enable support for EISA and ISA controllers */
static int probe_eisa_isa = 0;
/* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
static int force_dma32 = 0;
/* parameters for modprobe/insmod */
module_param_array(irq, int, NULL, 0);
module_param(disable, int, 0);
module_param(reserve_mode, int, 0);
module_param_array(reserve_list, int, NULL, 0);
module_param(reverse_scan, int, 0);
module_param(hdr_channel, int, 0);
module_param(max_ids, int, 0);
module_param(rescan, int, 0);
module_param(virt_ctr, int, 0);
module_param(shared_access, int, 0);
module_param(probe_eisa_isa, int, 0);
module_param(force_dma32, int, 0);
MODULE_AUTHOR("Achim Leubner");
MODULE_LICENSE("GPL");
/* ioctl interface */
static struct file_operations gdth_fops = {
.ioctl = gdth_ioctl,
.open = gdth_open,
.release = gdth_close,
};
#include "gdth_proc.h"
#include "gdth_proc.c"
/* notifier block to get a notify on system shutdown/halt/reboot */
static struct notifier_block gdth_notifier = {
gdth_halt, NULL, 0
};
static void gdth_delay(int milliseconds)
{
if (milliseconds == 0) {
udelay(1);
} else {
mdelay(milliseconds);
}
}
static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
{
*cyls = size /HEADS/SECS;
if (*cyls <= MAXCYLS) {
*heads = HEADS;
*secs = SECS;
} else { /* too high for 64*32 */
*cyls = size /MEDHEADS/MEDSECS;
if (*cyls <= MAXCYLS) {
*heads = MEDHEADS;
*secs = MEDSECS;
} else { /* too high for 127*63 */
*cyls = size /BIGHEADS/BIGSECS;
*heads = BIGHEADS;
*secs = BIGSECS;
}
}
}
/* controller search and initialization functions */
static int __init gdth_search_eisa(ushort eisa_adr)
{
ulong32 id;
TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
id = inl(eisa_adr+ID0REG);
if (id == GDT3A_ID || id == GDT3B_ID) { /* GDT3000A or GDT3000B */
if ((inb(eisa_adr+EISAREG) & 8) == 0)
return 0; /* not EISA configured */
return 1;
}
if (id == GDT3_ID) /* GDT3000 */
return 1;
return 0;
}
static int __init gdth_search_isa(ulong32 bios_adr)
{
void __iomem *addr;
ulong32 id;
TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
id = gdth_readl(addr);
iounmap(addr);
if (id == GDT2_ID) /* GDT2000 */
return 1;
}
return 0;
}
static int __init gdth_search_pci(gdth_pci_str *pcistr)
{
ushort device, cnt;
TRACE(("gdth_search_pci()\n"));
cnt = 0;
for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
PCI_DEVICE_ID_VORTEX_GDTNEWRX);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_SRC);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_SRC_XSCALE);
return cnt;
}
/* Vortex only makes RAID controllers.
* We do not really want to specify all 550 ids here, so wildcard match.
*/
static struct pci_device_id gdthtable[] __attribute_used__ = {
{PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
{0}
};
MODULE_DEVICE_TABLE(pci,gdthtable);
static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
ushort vendor, ushort device)
{
ulong base0, base1, base2;
struct pci_dev *pdev;
TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
*cnt, vendor, device));
pdev = NULL;
while ((pdev = pci_find_device(vendor, device, pdev))
!= NULL) {
if (pci_enable_device(pdev))
continue;
if (*cnt >= MAXHA)
return;
/* GDT PCI controller found, resources are already in pdev */
pcistr[*cnt].pdev = pdev;
pcistr[*cnt].vendor_id = vendor;
pcistr[*cnt].device_id = device;
pcistr[*cnt].subdevice_id = pdev->subsystem_device;
pcistr[*cnt].bus = pdev->bus->number;
pcistr[*cnt].device_fn = pdev->devfn;
pcistr[*cnt].irq = pdev->irq;
base0 = pci_resource_flags(pdev, 0);
base1 = pci_resource_flags(pdev, 1);
base2 = pci_resource_flags(pdev, 2);
if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
if (!(base0 & IORESOURCE_MEM))
continue;
pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
} else { /* GDT6110, GDT6120, .. */
if (!(base0 & IORESOURCE_MEM) ||
!(base2 & IORESOURCE_MEM) ||
!(base1 & IORESOURCE_IO))
continue;
pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
pcistr[*cnt].io = pci_resource_start(pdev, 1);
}
TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
pcistr[*cnt].irq, pcistr[*cnt].dpmem));
(*cnt)++;
}
}
static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
{
gdth_pci_str temp;
int i, changed;
TRACE(("gdth_sort_pci() cnt %d\n",cnt));
if (cnt == 0)
return;
do {
changed = FALSE;
for (i = 0; i < cnt-1; ++i) {
if (!reverse_scan) {
if ((pcistr[i].bus > pcistr[i+1].bus) ||
(pcistr[i].bus == pcistr[i+1].bus &&
PCI_SLOT(pcistr[i].device_fn) >
PCI_SLOT(pcistr[i+1].device_fn))) {
temp = pcistr[i];
pcistr[i] = pcistr[i+1];
pcistr[i+1] = temp;
changed = TRUE;
}
} else {
if ((pcistr[i].bus < pcistr[i+1].bus) ||
(pcistr[i].bus == pcistr[i+1].bus &&
PCI_SLOT(pcistr[i].device_fn) <
PCI_SLOT(pcistr[i+1].device_fn))) {
temp = pcistr[i];
pcistr[i] = pcistr[i+1];
pcistr[i+1] = temp;
changed = TRUE;
}
}
}
} while (changed);
}
static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
{
ulong32 retries,id;
unchar prot_ver,eisacf,i,irq_found;
TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
/* disable board interrupts, deinitialize services */
outb(0xff,eisa_adr+EDOORREG);
outb(0x00,eisa_adr+EDENABREG);
outb(0x00,eisa_adr+EINTENABREG);
outb(0xff,eisa_adr+LDOORREG);
retries = INIT_RETRIES;
gdth_delay(20);
while (inb(eisa_adr+EDOORREG) != 0xff) {
if (--retries == 0) {
printk("GDT-EISA: Initialization error (DEINIT failed)\n");
return 0;
}
gdth_delay(1);
TRACE2(("wait for DEINIT: retries=%d\n",retries));
}
prot_ver = inb(eisa_adr+MAILBOXREG);
outb(0xff,eisa_adr+EDOORREG);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-EISA: Illegal protocol version\n");
return 0;
}
ha->bmic = eisa_adr;
ha->brd_phys = (ulong32)eisa_adr >> 12;
outl(0,eisa_adr+MAILBOXREG);
outl(0,eisa_adr+MAILBOXREG+4);
outl(0,eisa_adr+MAILBOXREG+8);
outl(0,eisa_adr+MAILBOXREG+12);
/* detect IRQ */
if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
ha->oem_id = OEM_ID_ICP;
ha->type = GDT_EISA;
ha->stype = id;
outl(1,eisa_adr+MAILBOXREG+8);
outb(0xfe,eisa_adr+LDOORREG);
retries = INIT_RETRIES;
gdth_delay(20);
while (inb(eisa_adr+EDOORREG) != 0xfe) {
if (--retries == 0) {
printk("GDT-EISA: Initialization error (get IRQ failed)\n");
return 0;
}
gdth_delay(1);
}
ha->irq = inb(eisa_adr+MAILBOXREG);
outb(0xff,eisa_adr+EDOORREG);
TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
/* check the result */
if (ha->irq == 0) {
TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
for (i = 0, irq_found = FALSE;
i < MAXHA && irq[i] != 0xff; ++i) {
if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
irq_found = TRUE;
break;
}
}
if (irq_found) {
ha->irq = irq[i];
irq[i] = 0;
printk("GDT-EISA: Can not detect controller IRQ,\n");
printk("Use IRQ setting from command line (IRQ = %d)\n",
ha->irq);
} else {
printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
printk("the controller BIOS or use command line parameters\n");
return 0;
}
}
} else {
eisacf = inb(eisa_adr+EISAREG) & 7;
if (eisacf > 4) /* level triggered */
eisacf -= 4;
ha->irq = gdth_irq_tab[eisacf];
ha->oem_id = OEM_ID_ICP;
ha->type = GDT_EISA;
ha->stype = id;
}
ha->dma64_support = 0;
return 1;
}
static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
{
register gdt2_dpram_str __iomem *dp2_ptr;
int i;
unchar irq_drq,prot_ver;
ulong32 retries;
TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
if (ha->brd == NULL) {
printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
return 0;
}
dp2_ptr = ha->brd;
gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
/* reset interface area */
memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
if (gdth_readl(&dp2_ptr->u) != 0) {
printk("GDT-ISA: Initialization error (DPMEM write error)\n");
iounmap(ha->brd);
return 0;
}
/* disable board interrupts, read DRQ and IRQ */
gdth_writeb(0xff, &dp2_ptr->io.irqdel);
gdth_writeb(0x00, &dp2_ptr->io.irqen);
gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
irq_drq = gdth_readb(&dp2_ptr->io.rq);
for (i=0; i<3; ++i) {
if ((irq_drq & 1)==0)
break;
irq_drq >>= 1;
}
ha->drq = gdth_drq_tab[i];
irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
for (i=1; i<5; ++i) {
if ((irq_drq & 1)==0)
break;
irq_drq >>= 1;
}
ha->irq = gdth_irq_tab[i];
/* deinitialize services */