forked from analogdevicesinc/linux
-
Notifications
You must be signed in to change notification settings - Fork 3
/
cafe_ccic.c
2331 lines (1986 loc) · 56.5 KB
/
cafe_ccic.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe"
* multifunction chip. Currently works with the Omnivision OV7670
* sensor.
*
* The data sheet for this device can be found at:
* http://www.marvell.com/products/pcconn/88ALP01.jsp
*
* Copyright 2006 One Laptop Per Child Association, Inc.
* Copyright 2006-7 Jonathan Corbet <[email protected]>
*
* Written by Jonathan Corbet, [email protected].
*
* This file may be distributed under the terms of the GNU General
* Public License, version 2.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/videodev2.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-chip-ident.h>
#include <linux/device.h>
#include <linux/wait.h>
#include <linux/list.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/debugfs.h>
#include <linux/jiffies.h>
#include <linux/vmalloc.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include "cafe_ccic-regs.h"
#define CAFE_VERSION 0x000002
/*
* Parameters.
*/
MODULE_AUTHOR("Jonathan Corbet <[email protected]>");
MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("Video");
/*
* Internal DMA buffer management. Since the controller cannot do S/G I/O,
* we must have physically contiguous buffers to bring frames into.
* These parameters control how many buffers we use, whether we
* allocate them at load time (better chance of success, but nails down
* memory) or when somebody tries to use the camera (riskier), and,
* for load-time allocation, how big they should be.
*
* The controller can cycle through three buffers. We could use
* more by flipping pointers around, but it probably makes little
* sense.
*/
#define MAX_DMA_BUFS 3
static int alloc_bufs_at_read;
module_param(alloc_bufs_at_read, bool, 0444);
MODULE_PARM_DESC(alloc_bufs_at_read,
"Non-zero value causes DMA buffers to be allocated when the "
"video capture device is read, rather than at module load "
"time. This saves memory, but decreases the chances of "
"successfully getting those buffers.");
static int n_dma_bufs = 3;
module_param(n_dma_bufs, uint, 0644);
MODULE_PARM_DESC(n_dma_bufs,
"The number of DMA buffers to allocate. Can be either two "
"(saves memory, makes timing tighter) or three.");
static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
module_param(dma_buf_size, uint, 0444);
MODULE_PARM_DESC(dma_buf_size,
"The size of the allocated DMA buffers. If actual operating "
"parameters require larger buffers, an attempt to reallocate "
"will be made.");
static int min_buffers = 1;
module_param(min_buffers, uint, 0644);
MODULE_PARM_DESC(min_buffers,
"The minimum number of streaming I/O buffers we are willing "
"to work with.");
static int max_buffers = 10;
module_param(max_buffers, uint, 0644);
MODULE_PARM_DESC(max_buffers,
"The maximum number of streaming I/O buffers an application "
"will be allowed to allocate. These buffers are big and live "
"in vmalloc space.");
static int flip;
module_param(flip, bool, 0444);
MODULE_PARM_DESC(flip,
"If set, the sensor will be instructed to flip the image "
"vertically.");
enum cafe_state {
S_NOTREADY, /* Not yet initialized */
S_IDLE, /* Just hanging around */
S_FLAKED, /* Some sort of problem */
S_SINGLEREAD, /* In read() */
S_SPECREAD, /* Speculative read (for future read()) */
S_STREAMING /* Streaming data */
};
/*
* Tracking of streaming I/O buffers.
*/
struct cafe_sio_buffer {
struct list_head list;
struct v4l2_buffer v4lbuf;
char *buffer; /* Where it lives in kernel space */
int mapcount;
struct cafe_camera *cam;
};
/*
* A description of one of our devices.
* Locking: controlled by s_mutex. Certain fields, however, require
* the dev_lock spinlock; they are marked as such by comments.
* dev_lock is also required for access to device registers.
*/
struct cafe_camera
{
enum cafe_state state;
unsigned long flags; /* Buffer status, mainly (dev_lock) */
int users; /* How many open FDs */
struct file *owner; /* Who has data access (v4l2) */
/*
* Subsystem structures.
*/
struct pci_dev *pdev;
struct video_device v4ldev;
struct i2c_adapter i2c_adapter;
struct i2c_client *sensor;
unsigned char __iomem *regs;
struct list_head dev_list; /* link to other devices */
/* DMA buffers */
unsigned int nbufs; /* How many are alloc'd */
int next_buf; /* Next to consume (dev_lock) */
unsigned int dma_buf_size; /* allocated size */
void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */
dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */
unsigned int specframes; /* Unconsumed spec frames (dev_lock) */
unsigned int sequence; /* Frame sequence number */
unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual buffers */
/* Streaming buffers */
unsigned int n_sbufs; /* How many we have */
struct cafe_sio_buffer *sb_bufs; /* The array of housekeeping structs */
struct list_head sb_avail; /* Available for data (we own) (dev_lock) */
struct list_head sb_full; /* With data (user space owns) (dev_lock) */
struct tasklet_struct s_tasklet;
/* Current operating parameters */
u32 sensor_type; /* Currently ov7670 only */
struct v4l2_pix_format pix_format;
/* Locks */
struct mutex s_mutex; /* Access to this structure */
spinlock_t dev_lock; /* Access to device */
/* Misc */
wait_queue_head_t smbus_wait; /* Waiting on i2c events */
wait_queue_head_t iowait; /* Waiting on frame data */
#ifdef CONFIG_VIDEO_ADV_DEBUG
struct dentry *dfs_regs;
struct dentry *dfs_cam_regs;
#endif
};
/*
* Status flags. Always manipulated with bit operations.
*/
#define CF_BUF0_VALID 0 /* Buffers valid - first three */
#define CF_BUF1_VALID 1
#define CF_BUF2_VALID 2
#define CF_DMA_ACTIVE 3 /* A frame is incoming */
#define CF_CONFIG_NEEDED 4 /* Must configure hardware */
/*
* Start over with DMA buffers - dev_lock needed.
*/
static void cafe_reset_buffers(struct cafe_camera *cam)
{
int i;
cam->next_buf = -1;
for (i = 0; i < cam->nbufs; i++)
clear_bit(i, &cam->flags);
cam->specframes = 0;
}
static inline int cafe_needs_config(struct cafe_camera *cam)
{
return test_bit(CF_CONFIG_NEEDED, &cam->flags);
}
static void cafe_set_config_needed(struct cafe_camera *cam, int needed)
{
if (needed)
set_bit(CF_CONFIG_NEEDED, &cam->flags);
else
clear_bit(CF_CONFIG_NEEDED, &cam->flags);
}
/*
* Debugging and related.
*/
#define cam_err(cam, fmt, arg...) \
dev_err(&(cam)->pdev->dev, fmt, ##arg);
#define cam_warn(cam, fmt, arg...) \
dev_warn(&(cam)->pdev->dev, fmt, ##arg);
#define cam_dbg(cam, fmt, arg...) \
dev_dbg(&(cam)->pdev->dev, fmt, ##arg);
/* ---------------------------------------------------------------------*/
/*
* We keep a simple list of known devices to search at open time.
*/
static LIST_HEAD(cafe_dev_list);
static DEFINE_MUTEX(cafe_dev_list_lock);
static void cafe_add_dev(struct cafe_camera *cam)
{
mutex_lock(&cafe_dev_list_lock);
list_add_tail(&cam->dev_list, &cafe_dev_list);
mutex_unlock(&cafe_dev_list_lock);
}
static void cafe_remove_dev(struct cafe_camera *cam)
{
mutex_lock(&cafe_dev_list_lock);
list_del(&cam->dev_list);
mutex_unlock(&cafe_dev_list_lock);
}
static struct cafe_camera *cafe_find_dev(int minor)
{
struct cafe_camera *cam;
mutex_lock(&cafe_dev_list_lock);
list_for_each_entry(cam, &cafe_dev_list, dev_list) {
if (cam->v4ldev.minor == minor)
goto done;
}
cam = NULL;
done:
mutex_unlock(&cafe_dev_list_lock);
return cam;
}
static struct cafe_camera *cafe_find_by_pdev(struct pci_dev *pdev)
{
struct cafe_camera *cam;
mutex_lock(&cafe_dev_list_lock);
list_for_each_entry(cam, &cafe_dev_list, dev_list) {
if (cam->pdev == pdev)
goto done;
}
cam = NULL;
done:
mutex_unlock(&cafe_dev_list_lock);
return cam;
}
/* ------------------------------------------------------------------------ */
/*
* Device register I/O
*/
static inline void cafe_reg_write(struct cafe_camera *cam, unsigned int reg,
unsigned int val)
{
iowrite32(val, cam->regs + reg);
}
static inline unsigned int cafe_reg_read(struct cafe_camera *cam,
unsigned int reg)
{
return ioread32(cam->regs + reg);
}
static inline void cafe_reg_write_mask(struct cafe_camera *cam, unsigned int reg,
unsigned int val, unsigned int mask)
{
unsigned int v = cafe_reg_read(cam, reg);
v = (v & ~mask) | (val & mask);
cafe_reg_write(cam, reg, v);
}
static inline void cafe_reg_clear_bit(struct cafe_camera *cam,
unsigned int reg, unsigned int val)
{
cafe_reg_write_mask(cam, reg, 0, val);
}
static inline void cafe_reg_set_bit(struct cafe_camera *cam,
unsigned int reg, unsigned int val)
{
cafe_reg_write_mask(cam, reg, val, val);
}
/* -------------------------------------------------------------------- */
/*
* The I2C/SMBUS interface to the camera itself starts here. The
* controller handles SMBUS itself, presenting a relatively simple register
* interface; all we have to do is to tell it where to route the data.
*/
#define CAFE_SMBUS_TIMEOUT (HZ) /* generous */
static int cafe_smbus_write_done(struct cafe_camera *cam)
{
unsigned long flags;
int c1;
/*
* We must delay after the interrupt, or the controller gets confused
* and never does give us good status. Fortunately, we don't do this
* often.
*/
udelay(20);
spin_lock_irqsave(&cam->dev_lock, flags);
c1 = cafe_reg_read(cam, REG_TWSIC1);
spin_unlock_irqrestore(&cam->dev_lock, flags);
return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;
}
static int cafe_smbus_write_data(struct cafe_camera *cam,
u16 addr, u8 command, u8 value)
{
unsigned int rval;
unsigned long flags;
DEFINE_WAIT(the_wait);
spin_lock_irqsave(&cam->dev_lock, flags);
rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
/*
* Marvell sez set clkdiv to all 1's for now.
*/
rval |= TWSIC0_CLKDIV;
cafe_reg_write(cam, REG_TWSIC0, rval);
(void) cafe_reg_read(cam, REG_TWSIC1); /* force write */
rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
cafe_reg_write(cam, REG_TWSIC1, rval);
spin_unlock_irqrestore(&cam->dev_lock, flags);
/*
* Time to wait for the write to complete. THIS IS A RACY
* WAY TO DO IT, but the sad fact is that reading the TWSIC1
* register too quickly after starting the operation sends
* the device into a place that may be kinder and better, but
* which is absolutely useless for controlling the sensor. In
* practice we have plenty of time to get into our sleep state
* before the interrupt hits, and the worst case is that we
* time out and then see that things completed, so this seems
* the best way for now.
*/
do {
prepare_to_wait(&cam->smbus_wait, &the_wait,
TASK_UNINTERRUPTIBLE);
schedule_timeout(1); /* even 1 jiffy is too long */
finish_wait(&cam->smbus_wait, &the_wait);
} while (!cafe_smbus_write_done(cam));
#ifdef IF_THE_CAFE_HARDWARE_WORKED_RIGHT
wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(cam),
CAFE_SMBUS_TIMEOUT);
#endif
spin_lock_irqsave(&cam->dev_lock, flags);
rval = cafe_reg_read(cam, REG_TWSIC1);
spin_unlock_irqrestore(&cam->dev_lock, flags);
if (rval & TWSIC1_WSTAT) {
cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
command, value);
return -EIO;
}
if (rval & TWSIC1_ERROR) {
cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,
command, value);
return -EIO;
}
return 0;
}
static int cafe_smbus_read_done(struct cafe_camera *cam)
{
unsigned long flags;
int c1;
/*
* We must delay after the interrupt, or the controller gets confused
* and never does give us good status. Fortunately, we don't do this
* often.
*/
udelay(20);
spin_lock_irqsave(&cam->dev_lock, flags);
c1 = cafe_reg_read(cam, REG_TWSIC1);
spin_unlock_irqrestore(&cam->dev_lock, flags);
return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);
}
static int cafe_smbus_read_data(struct cafe_camera *cam,
u16 addr, u8 command, u8 *value)
{
unsigned int rval;
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
/*
* Marvel sez set clkdiv to all 1's for now.
*/
rval |= TWSIC0_CLKDIV;
cafe_reg_write(cam, REG_TWSIC0, rval);
(void) cafe_reg_read(cam, REG_TWSIC1); /* force write */
rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
cafe_reg_write(cam, REG_TWSIC1, rval);
spin_unlock_irqrestore(&cam->dev_lock, flags);
wait_event_timeout(cam->smbus_wait,
cafe_smbus_read_done(cam), CAFE_SMBUS_TIMEOUT);
spin_lock_irqsave(&cam->dev_lock, flags);
rval = cafe_reg_read(cam, REG_TWSIC1);
spin_unlock_irqrestore(&cam->dev_lock, flags);
if (rval & TWSIC1_ERROR) {
cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);
return -EIO;
}
if (! (rval & TWSIC1_RVALID)) {
cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
command);
return -EIO;
}
*value = rval & 0xff;
return 0;
}
/*
* Perform a transfer over SMBUS. This thing is called under
* the i2c bus lock, so we shouldn't race with ourselves...
*/
static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
unsigned short flags, char rw, u8 command,
int size, union i2c_smbus_data *data)
{
struct cafe_camera *cam = i2c_get_adapdata(adapter);
int ret = -EINVAL;
/*
* Refuse to talk to anything but OV cam chips. We should
* never even see an attempt to do so, but one never knows.
*/
if (cam->sensor && addr != cam->sensor->addr) {
cam_err(cam, "funky smbus addr %d\n", addr);
return -EINVAL;
}
/*
* This interface would appear to only do byte data ops. OK
* it can do word too, but the cam chip has no use for that.
*/
if (size != I2C_SMBUS_BYTE_DATA) {
cam_err(cam, "funky xfer size %d\n", size);
return -EINVAL;
}
if (rw == I2C_SMBUS_WRITE)
ret = cafe_smbus_write_data(cam, addr, command, data->byte);
else if (rw == I2C_SMBUS_READ)
ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
return ret;
}
static void cafe_smbus_enable_irq(struct cafe_camera *cam)
{
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_reg_set_bit(cam, REG_IRQMASK, TWSIIRQS);
spin_unlock_irqrestore(&cam->dev_lock, flags);
}
static u32 cafe_smbus_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_SMBUS_READ_BYTE_DATA |
I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
}
static struct i2c_algorithm cafe_smbus_algo = {
.smbus_xfer = cafe_smbus_xfer,
.functionality = cafe_smbus_func
};
/* Somebody is on the bus */
static int cafe_cam_init(struct cafe_camera *cam);
static void cafe_ctlr_stop_dma(struct cafe_camera *cam);
static void cafe_ctlr_power_down(struct cafe_camera *cam);
static int cafe_smbus_attach(struct i2c_client *client)
{
struct cafe_camera *cam = i2c_get_adapdata(client->adapter);
/*
* Don't talk to chips we don't recognize.
*/
if (client->driver->id == I2C_DRIVERID_OV7670) {
cam->sensor = client;
return cafe_cam_init(cam);
}
return -EINVAL;
}
static int cafe_smbus_detach(struct i2c_client *client)
{
struct cafe_camera *cam = i2c_get_adapdata(client->adapter);
if (cam->sensor == client) {
cafe_ctlr_stop_dma(cam);
cafe_ctlr_power_down(cam);
cam_err(cam, "lost the sensor!\n");
cam->sensor = NULL; /* Bummer, no camera */
cam->state = S_NOTREADY;
}
return 0;
}
static int cafe_smbus_setup(struct cafe_camera *cam)
{
struct i2c_adapter *adap = &cam->i2c_adapter;
int ret;
cafe_smbus_enable_irq(cam);
adap->id = I2C_HW_SMBUS_CAFE;
adap->owner = THIS_MODULE;
adap->client_register = cafe_smbus_attach;
adap->client_unregister = cafe_smbus_detach;
adap->algo = &cafe_smbus_algo;
strcpy(adap->name, "cafe_ccic");
adap->dev.parent = &cam->pdev->dev;
i2c_set_adapdata(adap, cam);
ret = i2c_add_adapter(adap);
if (ret)
printk(KERN_ERR "Unable to register cafe i2c adapter\n");
return ret;
}
static void cafe_smbus_shutdown(struct cafe_camera *cam)
{
i2c_del_adapter(&cam->i2c_adapter);
}
/* ------------------------------------------------------------------- */
/*
* Deal with the controller.
*/
/*
* Do everything we think we need to have the interface operating
* according to the desired format.
*/
static void cafe_ctlr_dma(struct cafe_camera *cam)
{
/*
* Store the first two Y buffers (we aren't supporting
* planar formats for now, so no UV bufs). Then either
* set the third if it exists, or tell the controller
* to just use two.
*/
cafe_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
cafe_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
if (cam->nbufs > 2) {
cafe_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
cafe_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
}
else
cafe_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
cafe_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */
}
static void cafe_ctlr_image(struct cafe_camera *cam)
{
int imgsz;
struct v4l2_pix_format *fmt = &cam->pix_format;
imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
(fmt->bytesperline & IMGSZ_H_MASK);
cafe_reg_write(cam, REG_IMGSIZE, imgsz);
cafe_reg_write(cam, REG_IMGOFFSET, 0);
/* YPITCH just drops the last two bits */
cafe_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
IMGP_YP_MASK);
/*
* Tell the controller about the image format we are using.
*/
switch (cam->pix_format.pixelformat) {
case V4L2_PIX_FMT_YUYV:
cafe_reg_write_mask(cam, REG_CTRL0,
C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
C0_DF_MASK);
break;
case V4L2_PIX_FMT_RGB444:
cafe_reg_write_mask(cam, REG_CTRL0,
C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
C0_DF_MASK);
/* Alpha value? */
break;
case V4L2_PIX_FMT_RGB565:
cafe_reg_write_mask(cam, REG_CTRL0,
C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
C0_DF_MASK);
break;
default:
cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
break;
}
/*
* Make sure it knows we want to use hsync/vsync.
*/
cafe_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
C0_SIFM_MASK);
}
/*
* Configure the controller for operation; caller holds the
* device mutex.
*/
static int cafe_ctlr_configure(struct cafe_camera *cam)
{
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_ctlr_dma(cam);
cafe_ctlr_image(cam);
cafe_set_config_needed(cam, 0);
spin_unlock_irqrestore(&cam->dev_lock, flags);
return 0;
}
static void cafe_ctlr_irq_enable(struct cafe_camera *cam)
{
/*
* Clear any pending interrupts, since we do not
* expect to have I/O active prior to enabling.
*/
cafe_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
cafe_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
}
static void cafe_ctlr_irq_disable(struct cafe_camera *cam)
{
cafe_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
}
/*
* Make the controller start grabbing images. Everything must
* be set up before doing this.
*/
static void cafe_ctlr_start(struct cafe_camera *cam)
{
/* set_bit performs a read, so no other barrier should be
needed here */
cafe_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
}
static void cafe_ctlr_stop(struct cafe_camera *cam)
{
cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
}
static void cafe_ctlr_init(struct cafe_camera *cam)
{
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
/*
* Added magic to bring up the hardware on the B-Test board
*/
cafe_reg_write(cam, 0x3038, 0x8);
cafe_reg_write(cam, 0x315c, 0x80008);
/*
* Go through the dance needed to wake the device up.
* Note that these registers are global and shared
* with the NAND and SD devices. Interaction between the
* three still needs to be examined.
*/
cafe_reg_write(cam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */
cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
/*
* Here we must wait a bit for the controller to come around.
*/
spin_unlock_irqrestore(&cam->dev_lock, flags);
msleep(5);
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_reg_write(cam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
cafe_reg_set_bit(cam, REG_GL_IMASK, GIMSK_CCIC_EN);
/*
* Make sure it's not powered down.
*/
cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
/*
* Turn off the enable bit. It sure should be off anyway,
* but it's good to be sure.
*/
cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
/*
* Mask all interrupts.
*/
cafe_reg_write(cam, REG_IRQMASK, 0);
/*
* Clock the sensor appropriately. Controller clock should
* be 48MHz, sensor "typical" value is half that.
*/
cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
spin_unlock_irqrestore(&cam->dev_lock, flags);
}
/*
* Stop the controller, and don't return until we're really sure that no
* further DMA is going on.
*/
static void cafe_ctlr_stop_dma(struct cafe_camera *cam)
{
unsigned long flags;
/*
* Theory: stop the camera controller (whether it is operating
* or not). Delay briefly just in case we race with the SOF
* interrupt, then wait until no DMA is active.
*/
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_ctlr_stop(cam);
spin_unlock_irqrestore(&cam->dev_lock, flags);
mdelay(1);
wait_event_timeout(cam->iowait,
!test_bit(CF_DMA_ACTIVE, &cam->flags), HZ);
if (test_bit(CF_DMA_ACTIVE, &cam->flags))
cam_err(cam, "Timeout waiting for DMA to end\n");
/* This would be bad news - what now? */
spin_lock_irqsave(&cam->dev_lock, flags);
cam->state = S_IDLE;
cafe_ctlr_irq_disable(cam);
spin_unlock_irqrestore(&cam->dev_lock, flags);
}
/*
* Power up and down.
*/
static void cafe_ctlr_power_up(struct cafe_camera *cam)
{
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
/*
* Part one of the sensor dance: turn the global
* GPIO signal on.
*/
cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
/*
* Put the sensor into operational mode (assumes OLPC-style
* wiring). Control 0 is reset - set to 1 to operate.
* Control 1 is power down, set to 0 to operate.
*/
cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */
// mdelay(1); /* Marvell says 1ms will do it */
cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
// mdelay(1); /* Enough? */
spin_unlock_irqrestore(&cam->dev_lock, flags);
msleep(5); /* Just to be sure */
}
static void cafe_ctlr_power_down(struct cafe_camera *cam)
{
unsigned long flags;
spin_lock_irqsave(&cam->dev_lock, flags);
cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT);
cafe_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
spin_unlock_irqrestore(&cam->dev_lock, flags);
}
/* -------------------------------------------------------------------- */
/*
* Communications with the sensor.
*/
static int __cafe_cam_cmd(struct cafe_camera *cam, int cmd, void *arg)
{
struct i2c_client *sc = cam->sensor;
int ret;
if (sc == NULL || sc->driver == NULL || sc->driver->command == NULL)
return -EINVAL;
ret = sc->driver->command(sc, cmd, arg);
if (ret == -EPERM) /* Unsupported command */
return 0;
return ret;
}
static int __cafe_cam_reset(struct cafe_camera *cam)
{
int zero = 0;
return __cafe_cam_cmd(cam, VIDIOC_INT_RESET, &zero);
}
/*
* We have found the sensor on the i2c. Let's try to have a
* conversation.
*/
static int cafe_cam_init(struct cafe_camera *cam)
{
struct v4l2_dbg_chip_ident chip;
int ret;
mutex_lock(&cam->s_mutex);
if (cam->state != S_NOTREADY)
cam_warn(cam, "Cam init with device in funky state %d",
cam->state);
ret = __cafe_cam_reset(cam);
if (ret)
goto out;
chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
chip.match.addr = cam->sensor->addr;
ret = __cafe_cam_cmd(cam, VIDIOC_DBG_G_CHIP_IDENT, &chip);
if (ret)
goto out;
cam->sensor_type = chip.ident;
// if (cam->sensor->addr != OV7xx0_SID) {
if (cam->sensor_type != V4L2_IDENT_OV7670) {
cam_err(cam, "Unsupported sensor type %d", cam->sensor->addr);
ret = -EINVAL;
goto out;
}
/* Get/set parameters? */
ret = 0;
cam->state = S_IDLE;
out:
cafe_ctlr_power_down(cam);
mutex_unlock(&cam->s_mutex);
return ret;
}
/*
* Configure the sensor to match the parameters we have. Caller should
* hold s_mutex
*/
static int cafe_cam_set_flip(struct cafe_camera *cam)
{
struct v4l2_control ctrl;
memset(&ctrl, 0, sizeof(ctrl));
ctrl.id = V4L2_CID_VFLIP;
ctrl.value = flip;
return __cafe_cam_cmd(cam, VIDIOC_S_CTRL, &ctrl);
}
static int cafe_cam_configure(struct cafe_camera *cam)
{
struct v4l2_format fmt;
int ret, zero = 0;
if (cam->state != S_IDLE)
return -EINVAL;
fmt.fmt.pix = cam->pix_format;
ret = __cafe_cam_cmd(cam, VIDIOC_INT_INIT, &zero);
if (ret == 0)
ret = __cafe_cam_cmd(cam, VIDIOC_S_FMT, &fmt);
/*
* OV7670 does weird things if flip is set *before* format...
*/
ret += cafe_cam_set_flip(cam);
return ret;
}
/* -------------------------------------------------------------------- */
/*
* DMA buffer management. These functions need s_mutex held.
*/
/* FIXME: this is inefficient as hell, since dma_alloc_coherent just
* does a get_free_pages() call, and we waste a good chunk of an orderN
* allocation. Should try to allocate the whole set in one chunk.
*/
static int cafe_alloc_dma_bufs(struct cafe_camera *cam, int loadtime)
{
int i;
cafe_set_config_needed(cam, 1);
if (loadtime)
cam->dma_buf_size = dma_buf_size;
else
cam->dma_buf_size = cam->pix_format.sizeimage;
if (n_dma_bufs > 3)
n_dma_bufs = 3;
cam->nbufs = 0;
for (i = 0; i < n_dma_bufs; i++) {
cam->dma_bufs[i] = dma_alloc_coherent(&cam->pdev->dev,
cam->dma_buf_size, cam->dma_handles + i,
GFP_KERNEL);
if (cam->dma_bufs[i] == NULL) {
cam_warn(cam, "Failed to allocate DMA buffer\n");
break;
}
/* For debug, remove eventually */
memset(cam->dma_bufs[i], 0xcc, cam->dma_buf_size);
(cam->nbufs)++;
}
switch (cam->nbufs) {
case 1:
dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size,
cam->dma_bufs[0], cam->dma_handles[0]);
cam->nbufs = 0;
case 0:
cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
return -ENOMEM;
case 2:
if (n_dma_bufs > 2)
cam_warn(cam, "Will limp along with only 2 buffers\n");
break;
}
return 0;
}
static void cafe_free_dma_bufs(struct cafe_camera *cam)
{
int i;
for (i = 0; i < cam->nbufs; i++) {
dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size,
cam->dma_bufs[i], cam->dma_handles[i]);
cam->dma_bufs[i] = NULL;
}
cam->nbufs = 0;
}
/* ----------------------------------------------------------------------- */
/*
* Here starts the V4L2 interface code.
*/
/*
* Read an image from the device.
*/