- Novi Sad, Serbia
- @micko_mame
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written in Verilog
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FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.
LunaPnR is a place and router for integrated circuits
AGM bitstream utilities and decoded files from Supra
HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs
Picorv32 SoC that uses only BRAM, not flash memory
Minimal ZX Spectrum for Ulx3s ECP5 board
Third-party bitstream documentation for Altera MAX7000 CPLDs