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atl1c_main.c
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atl1c_main.c
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/*
* Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
*
* Derived from Intel e1000 driver
* Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59
* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include "atl1c.h"
#define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
char atl1c_driver_name[] = "atl1c";
char atl1c_driver_version[] = ATL1C_DRV_VERSION;
#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
#define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
#define L2CB_V10 0xc0
#define L2CB_V11 0xc1
/*
* atl1c_pci_tbl - PCI Device ID Table
*
* Wildcard entries (PCI_ANY_ID) should come last
* Last entry must be all 0s
*
* { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
* Class, Class Mask, private data (not used) }
*/
static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
/* required last entry */
{ 0 }
};
MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
MODULE_AUTHOR("Jie Yang <[email protected]>");
MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(ATL1C_DRV_VERSION);
static int atl1c_stop_mac(struct atl1c_hw *hw);
static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
int *work_done, int work_to_do);
static int atl1c_up(struct atl1c_adapter *adapter);
static void atl1c_down(struct atl1c_adapter *adapter);
static const u16 atl1c_pay_load_size[] = {
128, 256, 512, 1024, 2048, 4096,
};
static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
{
REG_MB_RFD0_PROD_IDX,
REG_MB_RFD1_PROD_IDX,
REG_MB_RFD2_PROD_IDX,
REG_MB_RFD3_PROD_IDX
};
static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
{
REG_RFD0_HEAD_ADDR_LO,
REG_RFD1_HEAD_ADDR_LO,
REG_RFD2_HEAD_ADDR_LO,
REG_RFD3_HEAD_ADDR_LO
};
static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
{
REG_RRD0_HEAD_ADDR_LO,
REG_RRD1_HEAD_ADDR_LO,
REG_RRD2_HEAD_ADDR_LO,
REG_RRD3_HEAD_ADDR_LO
};
static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
static void atl1c_pcie_patch(struct atl1c_hw *hw)
{
u32 data;
AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
data |= PCIE_PHYMISC_FORCE_RCV_DET;
AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
PCIE_PHYMISC2_SERDES_CDR_SHIFT);
data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
PCIE_PHYMISC2_SERDES_TH_SHIFT);
data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
}
}
/* FIXME: no need any more ? */
/*
* atl1c_init_pcie - init PCIE module
*/
static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
{
u32 data;
u32 pci_cmd;
struct pci_dev *pdev = hw->adapter->pdev;
AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
PCI_COMMAND_IO);
AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
/*
* Clear any PowerSaveing Settings
*/
pci_enable_wake(pdev, PCI_D3hot, 0);
pci_enable_wake(pdev, PCI_D3cold, 0);
/*
* Mask some pcie error bits
*/
AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
data &= ~PCIE_UC_SERVRITY_DLP;
data &= ~PCIE_UC_SERVRITY_FCP;
AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
data &= ~LTSSM_ID_EN_WRO;
AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
atl1c_pcie_patch(hw);
if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
atl1c_disable_l0s_l1(hw);
if (flag & ATL1C_PCIE_PHY_RESET)
AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
else
AT_WRITE_REG(hw, REG_GPHY_CTRL,
GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
msleep(5);
}
/*
* atl1c_irq_enable - Enable default interrupt generation settings
* @adapter: board private structure
*/
static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
{
if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
AT_WRITE_FLUSH(&adapter->hw);
}
}
/*
* atl1c_irq_disable - Mask off interrupt generation on the NIC
* @adapter: board private structure
*/
static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
{
atomic_inc(&adapter->irq_sem);
AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
AT_WRITE_FLUSH(&adapter->hw);
synchronize_irq(adapter->pdev->irq);
}
/*
* atl1c_irq_reset - reset interrupt confiure on the NIC
* @adapter: board private structure
*/
static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
{
atomic_set(&adapter->irq_sem, 1);
atl1c_irq_enable(adapter);
}
/*
* atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
* of the idle status register until the device is actually idle
*/
static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
{
int timeout;
u32 data;
for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
AT_READ_REG(hw, REG_IDLE_STATUS, &data);
if ((data & IDLE_STATUS_MASK) == 0)
return 0;
msleep(1);
}
return data;
}
/*
* atl1c_phy_config - Timer Call-back
* @data: pointer to netdev cast into an unsigned long
*/
static void atl1c_phy_config(unsigned long data)
{
struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
struct atl1c_hw *hw = &adapter->hw;
unsigned long flags;
spin_lock_irqsave(&adapter->mdio_lock, flags);
atl1c_restart_autoneg(hw);
spin_unlock_irqrestore(&adapter->mdio_lock, flags);
}
void atl1c_reinit_locked(struct atl1c_adapter *adapter)
{
WARN_ON(in_interrupt());
atl1c_down(adapter);
atl1c_up(adapter);
clear_bit(__AT_RESETTING, &adapter->flags);
}
static void atl1c_check_link_status(struct atl1c_adapter *adapter)
{
struct atl1c_hw *hw = &adapter->hw;
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
int err;
unsigned long flags;
u16 speed, duplex, phy_data;
spin_lock_irqsave(&adapter->mdio_lock, flags);
/* MII_BMSR must read twise */
atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
spin_unlock_irqrestore(&adapter->mdio_lock, flags);
if ((phy_data & BMSR_LSTATUS) == 0) {
/* link down */
hw->hibernate = true;
if (atl1c_stop_mac(hw) != 0)
if (netif_msg_hw(adapter))
dev_warn(&pdev->dev, "stop mac failed\n");
atl1c_set_aspm(hw, false);
netif_carrier_off(netdev);
netif_stop_queue(netdev);
atl1c_phy_reset(hw);
atl1c_phy_init(&adapter->hw);
} else {
/* Link Up */
hw->hibernate = false;
spin_lock_irqsave(&adapter->mdio_lock, flags);
err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
spin_unlock_irqrestore(&adapter->mdio_lock, flags);
if (unlikely(err))
return;
/* link result is our setting */
if (adapter->link_speed != speed ||
adapter->link_duplex != duplex) {
adapter->link_speed = speed;
adapter->link_duplex = duplex;
atl1c_set_aspm(hw, true);
atl1c_enable_tx_ctrl(hw);
atl1c_enable_rx_ctrl(hw);
atl1c_setup_mac_ctrl(adapter);
if (netif_msg_link(adapter))
dev_info(&pdev->dev,
"%s: %s NIC Link is Up<%d Mbps %s>\n",
atl1c_driver_name, netdev->name,
adapter->link_speed,
adapter->link_duplex == FULL_DUPLEX ?
"Full Duplex" : "Half Duplex");
}
if (!netif_carrier_ok(netdev))
netif_carrier_on(netdev);
}
}
static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
u16 phy_data;
u16 link_up;
spin_lock(&adapter->mdio_lock);
atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
spin_unlock(&adapter->mdio_lock);
link_up = phy_data & BMSR_LSTATUS;
/* notify upper layer link down ASAP */
if (!link_up) {
if (netif_carrier_ok(netdev)) {
/* old link state: Up */
netif_carrier_off(netdev);
if (netif_msg_link(adapter))
dev_info(&pdev->dev,
"%s: %s NIC Link is Down\n",
atl1c_driver_name, netdev->name);
adapter->link_speed = SPEED_0;
}
}
adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
schedule_work(&adapter->common_task);
}
static void atl1c_common_task(struct work_struct *work)
{
struct atl1c_adapter *adapter;
struct net_device *netdev;
adapter = container_of(work, struct atl1c_adapter, common_task);
netdev = adapter->netdev;
if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
adapter->work_event &= ~ATL1C_WORK_EVENT_RESET;
netif_device_detach(netdev);
atl1c_down(adapter);
atl1c_up(adapter);
netif_device_attach(netdev);
return;
}
if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) {
adapter->work_event &= ~ATL1C_WORK_EVENT_LINK_CHANGE;
atl1c_check_link_status(adapter);
}
return;
}
static void atl1c_del_timer(struct atl1c_adapter *adapter)
{
del_timer_sync(&adapter->phy_config_timer);
}
/*
* atl1c_tx_timeout - Respond to a Tx Hang
* @netdev: network interface device structure
*/
static void atl1c_tx_timeout(struct net_device *netdev)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
/* Do the reset outside of interrupt context */
adapter->work_event |= ATL1C_WORK_EVENT_RESET;
schedule_work(&adapter->common_task);
}
/*
* atl1c_set_multi - Multicast and Promiscuous mode set
* @netdev: network interface device structure
*
* The set_multi entry point is called whenever the multicast address
* list or the network interface flags are updated. This routine is
* responsible for configuring the hardware for proper multicast,
* promiscuous mode, and all-multi behavior.
*/
static void atl1c_set_multi(struct net_device *netdev)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
struct atl1c_hw *hw = &adapter->hw;
struct netdev_hw_addr *ha;
u32 mac_ctrl_data;
u32 hash_value;
/* Check for Promiscuous and All Multicast modes */
AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
if (netdev->flags & IFF_PROMISC) {
mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
} else if (netdev->flags & IFF_ALLMULTI) {
mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
} else {
mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
}
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
/* clear the old settings from the multicast hash table */
AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
/* comoute mc addresses' hash value ,and put it into hash table */
netdev_for_each_mc_addr(ha, netdev) {
hash_value = atl1c_hash_mc_addr(hw, ha->addr);
atl1c_hash_set(hw, hash_value);
}
}
static void atl1c_vlan_rx_register(struct net_device *netdev,
struct vlan_group *grp)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
struct pci_dev *pdev = adapter->pdev;
u32 mac_ctrl_data = 0;
if (netif_msg_pktdata(adapter))
dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
atl1c_irq_disable(adapter);
adapter->vlgrp = grp;
AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
if (grp) {
/* enable VLAN tag insert/strip */
mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
} else {
/* disable VLAN tag insert/strip */
mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
}
AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
atl1c_irq_enable(adapter);
}
static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
{
struct pci_dev *pdev = adapter->pdev;
if (netif_msg_pktdata(adapter))
dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
}
/*
* atl1c_set_mac - Change the Ethernet Address of the NIC
* @netdev: network interface device structure
* @p: pointer to an address structure
*
* Returns 0 on success, negative on failure
*/
static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
struct sockaddr *addr = p;
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
if (netif_running(netdev))
return -EBUSY;
memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
atl1c_hw_set_mac_addr(&adapter->hw);
return 0;
}
static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
struct net_device *dev)
{
int mtu = dev->mtu;
adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
}
/*
* atl1c_change_mtu - Change the Maximum Transfer Unit
* @netdev: network interface device structure
* @new_mtu: new value for maximum frame size
*
* Returns 0 on success, negative on failure
*/
static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
int old_mtu = netdev->mtu;
int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
(max_frame > MAX_JUMBO_FRAME_SIZE)) {
if (netif_msg_link(adapter))
dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
return -EINVAL;
}
/* set MTU */
if (old_mtu != new_mtu && netif_running(netdev)) {
while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
msleep(1);
netdev->mtu = new_mtu;
adapter->hw.max_frame_size = new_mtu;
atl1c_set_rxbufsize(adapter, netdev);
if (new_mtu > MAX_TSO_FRAME_SIZE) {
adapter->netdev->features &= ~NETIF_F_TSO;
adapter->netdev->features &= ~NETIF_F_TSO6;
} else {
adapter->netdev->features |= NETIF_F_TSO;
adapter->netdev->features |= NETIF_F_TSO6;
}
atl1c_down(adapter);
atl1c_up(adapter);
clear_bit(__AT_RESETTING, &adapter->flags);
if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
u32 phy_data;
AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
phy_data |= 0x10000000;
AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
}
}
return 0;
}
/*
* caller should hold mdio_lock
*/
static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
u16 result;
atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
return result;
}
static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
int reg_num, int val)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
}
/*
* atl1c_mii_ioctl -
* @netdev:
* @ifreq:
* @cmd:
*/
static int atl1c_mii_ioctl(struct net_device *netdev,
struct ifreq *ifr, int cmd)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
struct pci_dev *pdev = adapter->pdev;
struct mii_ioctl_data *data = if_mii(ifr);
unsigned long flags;
int retval = 0;
if (!netif_running(netdev))
return -EINVAL;
spin_lock_irqsave(&adapter->mdio_lock, flags);
switch (cmd) {
case SIOCGMIIPHY:
data->phy_id = 0;
break;
case SIOCGMIIREG:
if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
&data->val_out)) {
retval = -EIO;
goto out;
}
break;
case SIOCSMIIREG:
if (data->reg_num & ~(0x1F)) {
retval = -EFAULT;
goto out;
}
dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
data->reg_num, data->val_in);
if (atl1c_write_phy_reg(&adapter->hw,
data->reg_num, data->val_in)) {
retval = -EIO;
goto out;
}
break;
default:
retval = -EOPNOTSUPP;
break;
}
out:
spin_unlock_irqrestore(&adapter->mdio_lock, flags);
return retval;
}
/*
* atl1c_ioctl -
* @netdev:
* @ifreq:
* @cmd:
*/
static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
{
switch (cmd) {
case SIOCGMIIPHY:
case SIOCGMIIREG:
case SIOCSMIIREG:
return atl1c_mii_ioctl(netdev, ifr, cmd);
default:
return -EOPNOTSUPP;
}
}
/*
* atl1c_alloc_queues - Allocate memory for all rings
* @adapter: board private structure to initialize
*
*/
static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
{
return 0;
}
static void atl1c_set_mac_type(struct atl1c_hw *hw)
{
switch (hw->device_id) {
case PCI_DEVICE_ID_ATTANSIC_L2C:
hw->nic_type = athr_l2c;
break;
case PCI_DEVICE_ID_ATTANSIC_L1C:
hw->nic_type = athr_l1c;
break;
case PCI_DEVICE_ID_ATHEROS_L2C_B:
hw->nic_type = athr_l2c_b;
break;
case PCI_DEVICE_ID_ATHEROS_L2C_B2:
hw->nic_type = athr_l2c_b2;
break;
case PCI_DEVICE_ID_ATHEROS_L1D:
hw->nic_type = athr_l1d;
break;
case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
hw->nic_type = athr_l1d_2;
break;
default:
break;
}
}
static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
{
u32 phy_status_data;
u32 link_ctrl_data;
atl1c_set_mac_type(hw);
AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
ATL1C_TXQ_MODE_ENHANCE;
if (link_ctrl_data & LINK_CTRL_L0S_EN)
hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
if (link_ctrl_data & LINK_CTRL_L1_EN)
hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
if (hw->nic_type == athr_l1c ||
hw->nic_type == athr_l1d ||
hw->nic_type == athr_l1d_2)
hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
return 0;
}
/*
* atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
* @adapter: board private structure to initialize
*
* atl1c_sw_init initializes the Adapter private data structure.
* Fields are initialized based on PCI device information and
* OS network device settings (MTU size).
*/
static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
{
struct atl1c_hw *hw = &adapter->hw;
struct pci_dev *pdev = adapter->pdev;
u32 revision;
adapter->wol = 0;
device_set_wakeup_enable(&pdev->dev, false);
adapter->link_speed = SPEED_0;
adapter->link_duplex = FULL_DUPLEX;
adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
adapter->tpd_ring[0].count = 1024;
adapter->rfd_ring[0].count = 512;
hw->vendor_id = pdev->vendor;
hw->device_id = pdev->device;
hw->subsystem_vendor_id = pdev->subsystem_vendor;
hw->subsystem_id = pdev->subsystem_device;
AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
hw->revision_id = revision & 0xFF;
/* before link up, we assume hibernate is true */
hw->hibernate = true;
hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
if (atl1c_setup_mac_funcs(hw) != 0) {
dev_err(&pdev->dev, "set mac function pointers failed\n");
return -1;
}
hw->intr_mask = IMR_NORMAL_MASK;
hw->phy_configured = false;
hw->preamble_len = 7;
hw->max_frame_size = adapter->netdev->mtu;
if (adapter->num_rx_queues < 2) {
hw->rss_type = atl1c_rss_disable;
hw->rss_mode = atl1c_rss_mode_disable;
} else {
hw->rss_type = atl1c_rss_ipv4;
hw->rss_mode = atl1c_rss_mul_que_mul_int;
hw->rss_hash_bits = 16;
}
hw->autoneg_advertised = ADVERTISED_Autoneg;
hw->indirect_tab = 0xE4E4E4E4;
hw->base_cpu = 0;
hw->ict = 50000; /* 100ms */
hw->smb_timer = 200000; /* 400ms */
hw->cmb_tpd = 4;
hw->cmb_tx_timer = 1; /* 2 us */
hw->rx_imt = 200;
hw->tx_imt = 1000;
hw->tpd_burst = 5;
hw->rfd_burst = 8;
hw->dma_order = atl1c_dma_ord_out;
hw->dmar_block = atl1c_dma_req_1024;
hw->dmaw_block = atl1c_dma_req_1024;
hw->dmar_dly_cnt = 15;
hw->dmaw_dly_cnt = 4;
if (atl1c_alloc_queues(adapter)) {
dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
return -ENOMEM;
}
/* TODO */
atl1c_set_rxbufsize(adapter, adapter->netdev);
atomic_set(&adapter->irq_sem, 1);
spin_lock_init(&adapter->mdio_lock);
spin_lock_init(&adapter->tx_lock);
set_bit(__AT_DOWN, &adapter->flags);
return 0;
}
static inline void atl1c_clean_buffer(struct pci_dev *pdev,
struct atl1c_buffer *buffer_info, int in_irq)
{
u16 pci_driection;
if (buffer_info->flags & ATL1C_BUFFER_FREE)
return;
if (buffer_info->dma) {
if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
pci_driection = PCI_DMA_FROMDEVICE;
else
pci_driection = PCI_DMA_TODEVICE;
if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
pci_unmap_single(pdev, buffer_info->dma,
buffer_info->length, pci_driection);
else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
pci_unmap_page(pdev, buffer_info->dma,
buffer_info->length, pci_driection);
}
if (buffer_info->skb) {
if (in_irq)
dev_kfree_skb_irq(buffer_info->skb);
else
dev_kfree_skb(buffer_info->skb);
}
buffer_info->dma = 0;
buffer_info->skb = NULL;
ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
}
/*
* atl1c_clean_tx_ring - Free Tx-skb
* @adapter: board private structure
*/
static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
enum atl1c_trans_queue type)
{
struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
struct atl1c_buffer *buffer_info;
struct pci_dev *pdev = adapter->pdev;
u16 index, ring_count;
ring_count = tpd_ring->count;
for (index = 0; index < ring_count; index++) {
buffer_info = &tpd_ring->buffer_info[index];
atl1c_clean_buffer(pdev, buffer_info, 0);
}
/* Zero out Tx-buffers */
memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
ring_count);
atomic_set(&tpd_ring->next_to_clean, 0);
tpd_ring->next_to_use = 0;
}
/*
* atl1c_clean_rx_ring - Free rx-reservation skbs
* @adapter: board private structure
*/
static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
{
struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
struct atl1c_buffer *buffer_info;
struct pci_dev *pdev = adapter->pdev;
int i, j;
for (i = 0; i < adapter->num_rx_queues; i++) {
for (j = 0; j < rfd_ring[i].count; j++) {
buffer_info = &rfd_ring[i].buffer_info[j];
atl1c_clean_buffer(pdev, buffer_info, 0);
}
/* zero out the descriptor ring */
memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
rfd_ring[i].next_to_clean = 0;
rfd_ring[i].next_to_use = 0;
rrd_ring[i].next_to_use = 0;
rrd_ring[i].next_to_clean = 0;
}
}
/*
* Read / Write Ptr Initialize:
*/
static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
{
struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
struct atl1c_buffer *buffer_info;
int i, j;
for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
tpd_ring[i].next_to_use = 0;
atomic_set(&tpd_ring[i].next_to_clean, 0);
buffer_info = tpd_ring[i].buffer_info;
for (j = 0; j < tpd_ring->count; j++)
ATL1C_SET_BUFFER_STATE(&buffer_info[i],
ATL1C_BUFFER_FREE);
}
for (i = 0; i < adapter->num_rx_queues; i++) {
rfd_ring[i].next_to_use = 0;
rfd_ring[i].next_to_clean = 0;
rrd_ring[i].next_to_use = 0;
rrd_ring[i].next_to_clean = 0;
for (j = 0; j < rfd_ring[i].count; j++) {
buffer_info = &rfd_ring[i].buffer_info[j];
ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
}
}
}
/*
* atl1c_free_ring_resources - Free Tx / RX descriptor Resources
* @adapter: board private structure
*
* Free all transmit software resources
*/
static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
{
struct pci_dev *pdev = adapter->pdev;
pci_free_consistent(pdev, adapter->ring_header.size,
adapter->ring_header.desc,
adapter->ring_header.dma);
adapter->ring_header.desc = NULL;
/* Note: just free tdp_ring.buffer_info,
* it contain rfd_ring.buffer_info, do not double free */
if (adapter->tpd_ring[0].buffer_info) {
kfree(adapter->tpd_ring[0].buffer_info);
adapter->tpd_ring[0].buffer_info = NULL;
}
}
/*
* atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
* @adapter: board private structure
*
* Return 0 on success, negative on failure
*/
static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
{
struct pci_dev *pdev = adapter->pdev;
struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
struct atl1c_ring_header *ring_header = &adapter->ring_header;
int num_rx_queues = adapter->num_rx_queues;
int size;
int i;
int count = 0;
int rx_desc_count = 0;
u32 offset = 0;
rrd_ring[0].count = rfd_ring[0].count;
for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
tpd_ring[i].count = tpd_ring[0].count;
for (i = 1; i < adapter->num_rx_queues; i++)
rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
/* 2 tpd queue, one high priority queue,
* another normal priority queue */
size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
rfd_ring->count * num_rx_queues);
tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
if (unlikely(!tpd_ring->buffer_info)) {
dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
size);
goto err_nomem;
}
for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
tpd_ring[i].buffer_info =
(struct atl1c_buffer *) (tpd_ring->buffer_info + count);
count += tpd_ring[i].count;
}
for (i = 0; i < num_rx_queues; i++) {
rfd_ring[i].buffer_info =
(struct atl1c_buffer *) (tpd_ring->buffer_info + count);
count += rfd_ring[i].count;
rx_desc_count += rfd_ring[i].count;
}
/*
* real ring DMA buffer
* each ring/block may need up to 8 bytes for alignment, hence the
* additional bytes tacked onto the end.
*/
ring_header->size = size =
sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
sizeof(struct atl1c_hw_stats) +
8 * 4 + 8 * 2 * num_rx_queues;
ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
&ring_header->dma);
if (unlikely(!ring_header->desc)) {
dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
goto err_nomem;
}
memset(ring_header->desc, 0, ring_header->size);
/* init TPD ring */
tpd_ring[0].dma = roundup(ring_header->dma, 8);
offset = tpd_ring[0].dma - ring_header->dma;
for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
tpd_ring[i].dma = ring_header->dma + offset;
tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
tpd_ring[i].size =
sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
offset += roundup(tpd_ring[i].size, 8);
}
/* init RFD ring */
for (i = 0; i < num_rx_queues; i++) {
rfd_ring[i].dma = ring_header->dma + offset;
rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
rfd_ring[i].count;
offset += roundup(rfd_ring[i].size, 8);
}
/* init RRD ring */
for (i = 0; i < num_rx_queues; i++) {
rrd_ring[i].dma = ring_header->dma + offset;
rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
rrd_ring[i].count;
offset += roundup(rrd_ring[i].size, 8);
}