{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":526230131,"defaultBranch":"main","name":"FPGA-Labs","ownerLogin":"Ahmed-ata112","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2022-08-18T13:46:20.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/72627749?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1660830381.341724","currentOid":""},"activityList":{"items":[{"before":"0c3af374c6816e2310c87e63245da739fa7a25b5","after":"cbc2b1c91c283f2caaa531fe0df57c0e72c9c216","ref":"refs/heads/main","pushedAt":"2023-03-19T18:51:57.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"Rufaida-Kassem","name":null,"path":"/Rufaida-Kassem","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/68002137?s=80&v=4"},"commit":{"message":"remaining labs","shortMessageHtmlLink":"remaining labs"}},{"before":"8096a2dbdb9198bc804cc853111f04af05a978d1","after":"0c3af374c6816e2310c87e63245da739fa7a25b5","ref":"refs/heads/main","pushedAt":"2023-03-19T18:49:32.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"Rufaida-Kassem","name":null,"path":"/Rufaida-Kassem","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/68002137?s=80&v=4"},"commit":{"message":"lab 5, 6","shortMessageHtmlLink":"lab 5, 6"}},{"before":"021a7bca2f4975e8dd5c8bf11cb06c3a0e81ff39","after":"8096a2dbdb9198bc804cc853111f04af05a978d1","ref":"refs/heads/main","pushedAt":"2023-03-19T18:46:59.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"Rufaida-Kassem","name":null,"path":"/Rufaida-Kassem","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/68002137?s=80&v=4"},"commit":{"message":"lab2, lab3","shortMessageHtmlLink":"lab2, lab3"}},{"before":"3de5b1d06f6f2cd8723cf2742b2d20611c206825","after":"021a7bca2f4975e8dd5c8bf11cb06c3a0e81ff39","ref":"refs/heads/main","pushedAt":"2023-03-19T18:44:49.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"Rufaida-Kassem","name":null,"path":"/Rufaida-Kassem","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/68002137?s=80&v=4"},"commit":{"message":"lab2 part 3, 5","shortMessageHtmlLink":"lab2 part 3, 5"}}],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"startCursor":"Y3Vyc29yOnYyOpK7MjAyMy0wMy0xOVQxODo1MTo1Ny4wMDAwMDBazwAAAAMGr7Q9","endCursor":"Y3Vyc29yOnYyOpK7MjAyMy0wMy0xOVQxODo0NDo0OS4wMDAwMDBazwAAAAMGrzQK"}},"title":"Activity · Ahmed-ata112/FPGA-Labs"}